]> git.hungrycats.org Git - linux/commit
perf/x86/intel: Fix PEBS data source interpretation on Nehalem/Westmere
authorAndi Kleen <ak@linux.intel.com>
Tue, 1 Mar 2016 22:25:24 +0000 (14:25 -0800)
committerJiri Slaby <jslaby@suse.cz>
Mon, 11 Apr 2016 14:44:29 +0000 (16:44 +0200)
commit718a4b101c98945544011f723d966fed3a08e875
tree1c3e644e0e4763a230dad83c876acd62885189ef
parent1c936da21740ad81b3008f7649fae5ceabd32925
perf/x86/intel: Fix PEBS data source interpretation on Nehalem/Westmere

commit e17dc65328057c00db7e1bfea249c8771a78b30b upstream.

Jiri reported some time ago that some entries in the PEBS data source table
in perf do not agree with the SDM. We investigated and the bits
changed for Sandy Bridge, but the SDM was not updated.

perf already implements the bits correctly for Sandy Bridge
and later. This patch patches it up for Nehalem and Westmere.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: jolsa@kernel.org
Link: http://lkml.kernel.org/r/1456871124-15985-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
arch/x86/kernel/cpu/perf_event.h
arch/x86/kernel/cpu/perf_event_intel.c
arch/x86/kernel/cpu/perf_event_intel_ds.c