[PATCH] via-rhine: reset logic

[PATCH] via-rhine: reset logic

Since Linus and Jeff raised the issue of PCI posted writes, I cleaned up
wait_for_reset() some more. Experiments show that with MMIO, a reset may
indeed take seemingly longer -- that is fixed by flushing that buffer.

Also, the driver now polls the appropriate register while waiting for the
reset to finish.