[PATCH] More SiS interrupt routing

[PATCH] More SiS interrupt routing

It turns out that the SiS irq routing logic doesn't go by chipset
after all - it's just that some pirq entries are "legacy" numbers,
while others are raw offsets into PCI config space (and the legacy
numbers are more commonly used with the older chipsets, which
explains the correlations).

This simplifies the router code substantially.