net: pcs: xpcs: fix the wrong register that was written back

commit 93ef6ee5c20e9330477930ec6347672c9e0cf5a6 upstream.

The value is read from the register TXGBE_RX_GEN_CTL3, and it should be
written back to TXGBE_RX_GEN_CTL3 when it changes some fields.

Cc: stable@vger.kernel.org
Fixes: f629acc6f210 ("net: pcs: xpcs: support to switch mode for Wangxun NICs")
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reported-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/20240924022857.865422-1-jiawenwu@trustnetic.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/pcs/pcs-xpcs-wx.c b/drivers/net/pcs/pcs-xpcs-wx.c
index 19c75886f070eaf2b856b8953b93911e0948e2ba..5f5cd3596cb846309514a1b133e773eae783c84e 100644 (file)
--- a/drivers/net/pcs/pcs-xpcs-wx.c
+++ b/drivers/net/pcs/pcs-xpcs-wx.c
@@ -109,7 +109,7 @@ static void txgbe_pma_config_1g(struct dw_xpcs *xpcs)
        txgbe_write_pma(xpcs, TXGBE_DFE_TAP_CTL0, 0);
        val = txgbe_read_pma(xpcs, TXGBE_RX_GEN_CTL3);
        val = u16_replace_bits(val, 0x4, TXGBE_RX_GEN_CTL3_LOS_TRSHLD0);
-       txgbe_write_pma(xpcs, TXGBE_RX_EQ_ATTN_CTL, val);
+       txgbe_write_pma(xpcs, TXGBE_RX_GEN_CTL3, val);
 
        txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL0, 0x20);
        txgbe_write_pma(xpcs, TXGBE_MPLLA_CTL3, 0x46);