drm/amdgpu/pm: Fix the param type of set_power_profile_mode

[ Upstream commit f683f24093dd94a831085fe0ea8e9dc4c6c1a2d1 ]

Function .set_power_profile_mode need an array as input
parameter. So define variable workload as an array to fix
the below coverity warning.

"Passing &workload to function hwmgr->hwmgr_func->set_power_profile_mode
which uses it as an array. This might corrupt or misinterpret adjacent
memory locations"

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
index 5fb21a0508cd993acccf18cf632955740878590e..f531ce1d2b1dcde42e3c614671effaa3a6acafb8 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
@@ -929,7 +929,7 @@ static int pp_dpm_switch_power_profile(void *handle,
                enum PP_SMC_POWER_PROFILE type, bool en)
 {
        struct pp_hwmgr *hwmgr = handle;
-       long workload;
+       long workload[1];
        uint32_t index;
 
        if (!hwmgr || !hwmgr->pm_en)
@@ -947,12 +947,12 @@ static int pp_dpm_switch_power_profile(void *handle,
                hwmgr->workload_mask &= ~(1 << hwmgr->workload_prority[type]);
                index = fls(hwmgr->workload_mask);
                index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0;
-               workload = hwmgr->workload_setting[index];
+               workload[0] = hwmgr->workload_setting[index];
        } else {
                hwmgr->workload_mask |= (1 << hwmgr->workload_prority[type]);
                index = fls(hwmgr->workload_mask);
                index = index <= Workload_Policy_Max ? index - 1 : 0;
-               workload = hwmgr->workload_setting[index];
+               workload[0] = hwmgr->workload_setting[index];
        }
 
        if (type == PP_SMC_POWER_PROFILE_COMPUTE &&
@@ -962,7 +962,7 @@ static int pp_dpm_switch_power_profile(void *handle,
        }
 
        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
-               hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0);
+               hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, workload, 0);
 
        return 0;
 }

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
index 1d829402cd2e23461b10e59d8817bf9d47357cb9..f4bd8e9357e225858d4bebf6d277e46d3b1f2e92 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pp_psm.c
@@ -269,7 +269,7 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_set
                                                struct pp_power_state *new_ps)
 {
        uint32_t index;
-       long workload;
+       long workload[1];
 
        if (hwmgr->not_vf) {
                if (!skip_display_settings)
@@ -294,10 +294,10 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_set
        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) {
                index = fls(hwmgr->workload_mask);
                index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0;
-               workload = hwmgr->workload_setting[index];
+               workload[0] = hwmgr->workload_setting[index];
 
-               if (hwmgr->power_profile_mode != workload && hwmgr->hwmgr_func->set_power_profile_mode)
-                       hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0);
+               if (hwmgr->power_profile_mode != workload[0] && hwmgr->hwmgr_func->set_power_profile_mode)
+                       hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, workload, 0);
        }
 
        return 0;

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index e1796ecf9c05c44a0cdaa8940ba08dac1a0c0853..06409133b09b1f0eee7d9f7a8ed3f540c638a849 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2220,7 +2220,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu,
 {
        int ret = 0;
        int index = 0;
-       long workload;
+       long workload[1];
        struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
 
        if (!skip_display_settings) {
@@ -2260,10 +2260,10 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu,
                smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
                index = fls(smu->workload_mask);
                index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
-               workload = smu->workload_setting[index];
+               workload[0] = smu->workload_setting[index];
 
-               if (smu->power_profile_mode != workload)
-                       smu_bump_power_profile_mode(smu, &workload, 0);
+               if (smu->power_profile_mode != workload[0])
+                       smu_bump_power_profile_mode(smu, workload, 0);
        }
 
        return ret;
@@ -2313,7 +2313,7 @@ static int smu_switch_power_profile(void *handle,
 {
        struct smu_context *smu = handle;
        struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
-       long workload;
+       long workload[1];
        uint32_t index;
 
        if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
@@ -2326,17 +2326,17 @@ static int smu_switch_power_profile(void *handle,
                smu->workload_mask &= ~(1 << smu->workload_prority[type]);
                index = fls(smu->workload_mask);
                index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
-               workload = smu->workload_setting[index];
+               workload[0] = smu->workload_setting[index];
        } else {
                smu->workload_mask |= (1 << smu->workload_prority[type]);
                index = fls(smu->workload_mask);
                index = index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
-               workload = smu->workload_setting[index];
+               workload[0] = smu->workload_setting[index];
        }
 
        if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
                smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)
-               smu_bump_power_profile_mode(smu, &workload, 0);
+               smu_bump_power_profile_mode(smu, workload, 0);
 
        return 0;
 }