[ARM PATCH] 2121/1: S3C2410 - add S3C2410_MISCCR definitions for power down config

Patch from Ben Dooks

Add definitions to the MISCCR register for configuration
of the signal states in power down mode.

Signed-off-by: Ben Dooks

diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index 3005e1eac2734fb5e78f61b8a1034d9d0fca7b73..e11a898f07db6fa4cb32255fa06bf1f1b68ed3f2 100644 (file)
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -751,6 +751,11 @@
 
 #define S3C2410_MISCCR_nRSTCON     (1<<16)
 
+#define S3C2410_MISCCR_nEN_SCLK0    (1<<17)
+#define S3C2410_MISCCR_nEN_SCLK1    (1<<18)
+#define S3C2410_MISCCR_nEN_SCLKE    (1<<19)
+#define S3C2410_MISCCR_SDSLEEP     (7<<17)
+
 /* external interrupt control... */
 /* S3C2410_EXTINT0 -> irq sense control for EINT0..EINT7
  * S3C2410_EXTINT1 -> irq sense control for EINT8..EINT15