This updates the F00F bug workaround code to the IDT changes in the TLS
patch.
Tested it on a non-Pentium box on which i triggered the workaround
artificially.
.globl cpu_gdt_descr
ALIGN
+ .word 0 # 32-bit align idt_desc.address
idt_descr:
.word IDT_ENTRIES*8-1 # idt contains 256 entries
.long idt_table
__set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
/*
- * "idt" is magic - it overlaps the idt_descr
- * variable so that updating idt will automatically
- * update the idt descriptor..
+ * Update the IDT descriptor and reload the IDT so that
+ * it uses the read-only mapped virtual address.
*/
- idt = (struct desc_struct *) fix_to_virt(FIX_F00F_IDT);
+ idt_descr.address = fix_to_virt(FIX_F00F_IDT);
__asm__ __volatile__("lidt %0": "=m" (idt_descr));
}
#endif
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/hardirq.h>
+#include <asm/desc.h>
extern void die(const char *,struct pt_regs *,long);
}
asmlinkage void do_invalid_op(struct pt_regs *, unsigned long);
-extern unsigned long idt;
/*
* This routine handles page faults. It determines the address,
if (boot_cpu_data.f00f_bug) {
unsigned long nr;
- nr = (address - idt) >> 3;
+ nr = (address - idt_descr.address) >> 3;
if (nr == 6) {
do_invalid_op(regs, 0);