int i;
unsigned long val, ovfl_val = pmu_conf.ovfl_val;
- DPRINT(("mask=0x%lx\n", mask));
for (i=0; mask; i++, mask>>=1) {
if ((mask & 0x1) == 0) continue;
val = PMD_IS_COUNTING(i) ? pmds[i] & ovfl_val : pmds[i];
ia64_set_pmd(i, val);
- DPRINT(("pmd[%d]=0x%lx\n", i, val));
}
ia64_srlz_d();
}
{
int i;
- DPRINT(("mask=0x%lx\n", mask));
for (i=0; mask; i++, mask>>=1) {
if ((mask & 0x1) == 0) continue;
ia64_set_pmc(i, pmcs[i]);
- DPRINT(("pmc[%d]=0x%lx\n", i, pmcs[i]));
}
ia64_srlz_d();
}
ctx = PFM_GET_CTX(task);
- if (ctx == NULL) goto save_error;
+ if (ctx == NULL) return;
t = &task->thread;
/*
pfm_clear_psr_up();
- DPRINT(("ctx zombie, forcing cleanup for [%d]\n", task->pid));
-
pfm_force_cleanup(ctx, regs);
BUG_ON(ctx->ctx_smpl_hdr);
* sanity check
*/
if (ctx->ctx_last_activation != GET_ACTIVATION()) {
- printk("ctx_activation=%lu activation=%lu state=%d: no save\n",
- ctx->ctx_last_activation,
- GET_ACTIVATION(), ctx->ctx_state);
-
pfm_unprotect_ctx_ctxsw(ctx, flags);
-
return;
}
* interrupts will still be masked after this call.
*/
pfm_unprotect_ctx_ctxsw(ctx, flags);
-
- return;
-
-save_error:
- printk(KERN_ERR "perfmon: pfm_save_regs CPU%d [%d] NULL context PM_VALID=%ld\n",
- smp_processor_id(), task->pid,
- task->thread.flags & IA64_THREAD_PM_VALID);
}
#else /* !CONFIG_SMP */
u64 psr;
ctx = PFM_GET_CTX(task);
- if (ctx == NULL) goto save_error;
+ if (ctx == NULL) return;
/*
* save current PSR: needed because we modify it
* keep a copy of psr.up (for reload)
*/
ctx->ctx_saved_psr_up = psr & IA64_PSR_UP;
-
- return;
-save_error:
- printk(KERN_ERR "perfmon: pfm_save_regs CPU%d [%d] NULL context PM_VALID=%ld\n",
- smp_processor_id(), task->pid,
- task->thread.flags & IA64_THREAD_PM_VALID);
}
static void
ctx = PFM_GET_CTX(task);
t = &task->thread;
- DPRINT(("on [%d] used_pmds=0x%lx\n", task->pid, ctx->ctx_used_pmds[0]));
-
/*
* we need to mask PMU overflow here to
* make sure that we maintain pmc0 until
u64 psr, psr_up;
ctx = PFM_GET_CTX(task);
- if (unlikely(ctx == NULL)) {
- printk(KERN_ERR "perfmon: pfm_load_regs() null context\n");
- return;
- }
+ if (unlikely(ctx == NULL)) return;
BUG_ON(GET_PMU_OWNER());
/*
* possible on unload
*/
- if (unlikely((t->flags & IA64_THREAD_PM_VALID) == 0)) {
- printk("[%d] PM_VALID=0, nothing to do\n", task->pid);
- return;
- }
+ if (unlikely((t->flags & IA64_THREAD_PM_VALID) == 0)) return;
/*
* we always come here with interrupts ALREADY disabled by
BUG_ON(ctx->ctx_smpl_hdr);
- DPRINT(("ctx zombie, forcing cleanup for [%d]\n", task->pid));
-
pfm_force_cleanup(ctx, regs);
pfm_unprotect_ctx_ctxsw(ctx, flags);
pmc_mask = ctx->ctx_reload_pmcs[0];
pmd_mask = ctx->ctx_reload_pmds[0];
- if (pmc_mask || pmd_mask) DPRINT(("partial reload [%d] pmd_mask=0x%lx pmc_mask=0x%lx\n", task->pid, pmd_mask, pmc_mask));
} else {
/*
* To avoid leaking information to the user level when psr.sp=0,
* PMC0 is never in the mask. It is always restored separately.
*/
pmc_mask = ctx->ctx_all_pmcs[0];
-
- DPRINT(("full reload for [%d] activation=%lu last_activation=%lu last_cpu=%d pmd_mask=0x%lx pmc_mask=0x%lx\n",
- task->pid,
- GET_ACTIVATION(), ctx->ctx_last_activation,
- GET_LAST_CPU(ctx), pmd_mask, pmc_mask));
-
}
/*
* when context is MASKED, we will restore PMC with plm=0
/*
* will replay the PMU interrupt
*/
- DPRINT(("perfmon: resend irq for [%d]\n", task->pid));
hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
#endif
pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
return;
}
- DPRINT(("reload for [%d] owner=%d\n", task->pid, owner ? owner->pid : -1));
-
/*
* someone else is still using the PMU, first push it out and
* then we'll be able to install our stuff !
/*
* will replay the PMU interrupt
*/
- DPRINT(("perfmon: resend irq for [%d]\n", task->pid));
hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
#endif
pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;