]> git.hungrycats.org Git - linux/commitdiff
spi: armada-3700: Fix failing commands with quad-SPI
authorMiquel Raynal <miquel.raynal@free-electrons.com>
Wed, 13 Sep 2017 16:21:38 +0000 (18:21 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 2 Nov 2017 08:54:46 +0000 (09:54 +0100)
commit 747e1f60470b975363cbbfcde0c41a3166391be5 upstream.

A3700 SPI controller datasheet states that only the first line (IO0) is
used to receive and send instructions, addresses and dummy bytes,
unless for addresses during an RX operation in a quad SPI configuration
(see p.821 of the Armada-3720-DB datasheet). Otherwise, some commands
such as SPI NOR commands like READ_FROM_CACHE_DUAL_IO(0xeb) and
READ_FROM_CACHE_DUAL_IO(0xbb) will fail because these commands must send
address bytes through the four pins. Data transfer always use the four
bytes with this setup.

Thus, in quad SPI configuration, the A3700_SPI_ADDR_PIN bit must be set
only in this case to inform the controller that it must use the number
of pins indicated in the {A3700_SPI_DATA_PIN1,A3700_SPI_DATA_PIN0} field
during the address cycles of an RX operation.

Suggested-by: Ken Ma <make@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/spi/spi-armada-3700.c

index bd822c32ae3b4404a310fe7ef3cb2f668e937bee..53a04267eb38588e3509c6e20c893d7ad4428f9a 100644 (file)
@@ -161,7 +161,7 @@ static void a3700_spi_deactivate_cs(struct a3700_spi *a3700_spi,
 }
 
 static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
-                                 unsigned int pin_mode)
+                                 unsigned int pin_mode, bool receiving)
 {
        u32 val;
 
@@ -177,6 +177,9 @@ static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
                break;
        case SPI_NBITS_QUAD:
                val |= A3700_SPI_DATA_PIN1;
+               /* RX during address reception uses 4-pin */
+               if (receiving)
+                       val |= A3700_SPI_ADDR_PIN;
                break;
        default:
                dev_err(&a3700_spi->master->dev, "wrong pin mode %u", pin_mode);
@@ -654,7 +657,7 @@ static int a3700_spi_transfer_one(struct spi_master *master,
        else if (xfer->rx_buf)
                nbits = xfer->rx_nbits;
 
-       a3700_spi_pin_mode_set(a3700_spi, nbits);
+       a3700_spi_pin_mode_set(a3700_spi, nbits, xfer->rx_buf ? true : false);
 
        if (xfer->rx_buf) {
                /* Set read data length */