[PATCH] ppc32: fix PFC1_EPS and PFC1_EPS_SHIFT for IBM440GX

While writing some BSP code for a 440GX custom board, I noticed, that the
DCRN_SDR_PFC1_EPS and DCRN_SDR_PFC1_EPS_SHIFT definitions are wrong and
therefore the functions ibm440gx_get_eth_grp() and ibm440gx_set_eth_grp()
won't work correctly.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Gerhard Jaeger <gjaeger@sysgo.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
index bed6a7e0171e39f52abbfce4ec3df0cb538ee809..2aea5c891a15a43598965772f04cef0157d97f90 100644 (file)
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -94,8 +94,8 @@
 #define DCRN_SDR_CONFIG_DATA   0xf
 #define DCRN_SDR_PFC0          0x4100
 #define DCRN_SDR_PFC1          0x4101
-#define DCRN_SDR_PFC1_EPS      0x1c000000
-#define DCRN_SDR_PFC1_EPS_SHIFT        26
+#define DCRN_SDR_PFC1_EPS      0x1c00000
+#define DCRN_SDR_PFC1_EPS_SHIFT        22
 #define DCRN_SDR_PFC1_RMII     0x02000000
 #define DCRN_SDR_MFR           0x4300
 #define DCRN_SDR_MFR_TAH0      0x80000000      /* TAHOE0 Enable */