This small fix is needed for machines with more than 128 nodes.
#ifdef CONFIG_NUMA
/* on which node is each logical CPU (one cacheline even for 64 CPUs) */
-volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
+volatile u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
/* which logical CPUs are on which nodes */
volatile cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
#include <asm/mmzone.h>
-extern volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
+extern volatile u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
extern volatile cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
/* Stuff below this line could be architecture independent */