]> git.hungrycats.org Git - linux/commitdiff
ASoC: rockchip: rockchip_pdm: Reorder clock enable sequence
authorbui duc phuc <phucduc.bui@gmail.com>
Tue, 2 Jun 2026 10:16:06 +0000 (17:16 +0700)
committerMark Brown <broonie@kernel.org>
Thu, 11 Jun 2026 19:49:40 +0000 (20:49 +0100)
Enable the 'hclk' bus clock before the 'clk' controller clock during
runtime resume.
The bus clock provides the register access interface, so enable it before
the controller clock. This also makes the resume sequence the reverse of
the suspend sequence, which keeps the clock ordering consistent.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Link: https://patch.msgid.link/20260602101608.45137-4-phucduc.bui@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_pdm.c

index c69cdd6f24994ca5ecbf6d29b926cbcd1f693b33..8f78f7bc1806c6100bde8dab482030bfa7d33e5e 100644 (file)
@@ -422,16 +422,16 @@ static int rockchip_pdm_runtime_resume(struct device *dev)
        struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
        int ret;
 
-       ret = clk_prepare_enable(pdm->clk);
+       ret = clk_prepare_enable(pdm->hclk);
        if (ret) {
-               dev_err(pdm->dev, "clock enable failed %d\n", ret);
+               dev_err(pdm->dev, "hclock enable failed %d\n", ret);
                return ret;
        }
 
-       ret = clk_prepare_enable(pdm->hclk);
+       ret = clk_prepare_enable(pdm->clk);
        if (ret) {
-               clk_disable_unprepare(pdm->clk);
-               dev_err(pdm->dev, "hclock enable failed %d\n", ret);
+               clk_disable_unprepare(pdm->hclk);
+               dev_err(pdm->dev, "clock enable failed %d\n", ret);
                return ret;
        }