]> git.hungrycats.org Git - linux/commitdiff
x86/cpufeatures: Add FEATURE_ZEN
authorThomas Gleixner <tglx@linutronix.de>
Thu, 10 May 2018 14:26:00 +0000 (16:26 +0200)
committerBen Hutchings <ben@decadent.org.uk>
Wed, 3 Oct 2018 03:09:46 +0000 (04:09 +0100)
commit d1035d971829dcf80e8686ccde26f94b0a069472 upstream.

Add a ZEN feature bit so family-dependent static_cpu_has() optimizations
can be built for ZEN.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[bwh: Backported to 3.16:
 - Use the next available bit number in CPU feature word 7
 - Adjust filename, context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
arch/x86/include/asm/cpufeature.h
arch/x86/kernel/cpu/amd.c

index e675956f5d65b22fbe469bb3be69f0fed55a113f..bcd61ed25931a469846d23fd02dc2729e727bb9e 100644 (file)
 #define X86_FEATURE_STIBP      (7*32+18) /* Single Thread Indirect Branch Predictors */
 #define X86_FEATURE_MSR_SPEC_CTRL (7*32+19) /* "" MSR SPEC_CTRL is implemented */
 #define X86_FEATURE_SSBD       (7*32+20) /* Speculative Store Bypass Disable */
+#define X86_FEATURE_ZEN                (7*32+21) /* "" CPU is AMD family 0x17 (Zen) */
 
 #define X86_FEATURE_RETPOLINE  (7*32+29) /* "" Generic Retpoline mitigation for Spectre variant 2 */
 #define X86_FEATURE_RETPOLINE_AMD (7*32+30) /* "" AMD Retpoline mitigation for Spectre variant 2 */
index e6a095f41bc2b5c0505801c60100306e158aa0fc..ccfb36b455a4f70fd2b08c21c20cd9bebf20e45d 100644 (file)
@@ -556,6 +556,7 @@ static void init_amd_ln(struct cpuinfo_x86 *c)
 
 static void init_amd_zn(struct cpuinfo_x86 *c)
 {
+       set_cpu_cap(c, X86_FEATURE_ZEN);
        /*
         * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
         * all up to and including B1.