drm/msm/dp: extract MISC1_MISC0 configuration into a separate function

Refactor the MISC1_MISC0 register configuration into a standalone helper
function to support MST.

Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/742735/
Link: https://lore.kernel.org/r/20260728-dp_mstclean-v9-5-f7779fce10f4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 7c0649d5318f1cdc3f5c80c552cef98f2a2d69ad..c557e0f01dc69847ea941e249de92ce88ec6193d 100644 (file)
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -462,17 +462,13 @@ static void msm_dp_ctrl_lane_mapping(struct msm_dp_ctrl_private *ctrl)
                        ln_mapping);
 }
 
-static void msm_dp_ctrl_configure_source_params(struct msm_dp_ctrl_private *ctrl)
+static void msm_dp_ctrl_config_misc1_misc0(struct msm_dp_ctrl_private *ctrl,
+                                          struct msm_dp_panel *msm_dp_panel)
 {
        u32 colorimetry_cfg, test_bits_depth, misc_val;
 
-       msm_dp_ctrl_lane_mapping(ctrl);
-       msm_dp_setup_peripheral_flush(ctrl);
-
-       msm_dp_ctrl_config_ctrl_link(ctrl);
-       msm_dp_ctrl_config_ctrl_streams(ctrl, ctrl->panel);
-
-       test_bits_depth = msm_dp_link_get_test_bits_depth(ctrl->link, ctrl->panel->msm_dp_mode.bpp);
+       test_bits_depth = msm_dp_link_get_test_bits_depth(ctrl->link,
+                                                         msm_dp_panel->msm_dp_mode.bpp);
        colorimetry_cfg = msm_dp_link_get_colorimetry_config(ctrl->link);
 
        misc_val = msm_dp_read_link(ctrl, REG_DP_MISC1_MISC0);
@@ -486,6 +482,17 @@ static void msm_dp_ctrl_configure_source_params(struct msm_dp_ctrl_private *ctrl
 
        drm_dbg_dp(ctrl->drm_dev, "misc settings = 0x%x\n", misc_val);
        msm_dp_write_link(ctrl, REG_DP_MISC1_MISC0, misc_val);
+}
+
+static void msm_dp_ctrl_configure_source_params(struct msm_dp_ctrl_private *ctrl)
+{
+       msm_dp_ctrl_lane_mapping(ctrl);
+       msm_dp_setup_peripheral_flush(ctrl);
+
+       msm_dp_ctrl_config_ctrl_link(ctrl);
+       msm_dp_ctrl_config_ctrl_streams(ctrl, ctrl->panel);
+
+       msm_dp_ctrl_config_misc1_misc0(ctrl, ctrl->panel);
 
        msm_dp_panel_timing_cfg(ctrl->panel, ctrl->msm_dp_ctrl.wide_bus_en);
 }