KVM: PPC: Book3S PR: Ignore PMU SPRs

commit f8f6eb0d189cf2724af5ebc8cad460c78fb1994e upstream.

When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs
that we don't emulate. Just ignore accesses to them.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>

diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index 360ce68c98099f1cc3495107f112f4b19e82f56f..57913b199919d261e9596081e6ba9dd02a518709 100644 (file)
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -459,6 +459,13 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
        case SPRN_WPAR_GEKKO:
        case SPRN_MSSSR0:
        case SPRN_DABR:
+#ifdef CONFIG_PPC_BOOK3S_64
+       case SPRN_MMCRS:
+       case SPRN_MMCRA:
+       case SPRN_MMCR0:
+       case SPRN_MMCR1:
+       case SPRN_MMCR2:
+#endif
                break;
 unprivileged:
        default:
@@ -557,6 +564,13 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
        case SPRN_WPAR_GEKKO:
        case SPRN_MSSSR0:
        case SPRN_DABR:
+#ifdef CONFIG_PPC_BOOK3S_64
+       case SPRN_MMCRS:
+       case SPRN_MMCRA:
+       case SPRN_MMCR0:
+       case SPRN_MMCR1:
+       case SPRN_MMCR2:
+#endif
                *spr_val = 0;
                break;
        default: