works again on the simulator (besides the real hw, of course).
Also, clean up simulator bootloader code so it's all in
a single place (arch/ia64/hp/sim/bootloader/).
drivers-$(CONFIG_IA64_HP_ZX1) += arch/ia64/hp/common/ arch/ia64/hp/zx1/
drivers-$(CONFIG_IA64_GENERIC) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ arch/ia64/hp/sim/
-boot := arch/ia64/boot
+boot := arch/ia64/hp/sim/boot
.PHONY: boot compressed check
+++ /dev/null
-#
-# ia64/boot/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1998 by David Mosberger-Tang <davidm@hpl.hp.com>
-#
-
-targets-$(CONFIG_IA64_HP_SIM) += bootloader
-targets := vmlinux.bin vmlinux.gz $(targets-y)
-
-quiet_cmd_cptotop = LN $@
- cmd_cptotop = ln -f $< $@
-
-vmlinux.gz: $(obj)/vmlinux.gz $(addprefix $(obj)/,$(targets-y))
- $(call cmd,cptotop)
- @echo ' Kernel: $@ is ready'
-
-boot: bootloader
-
-bootloader: $(obj)/bootloader
- $(call cmd,cptotop)
-
-$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
- $(call if_changed,gzip)
-
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-
-LDFLAGS_bootloader = -static -T
-
-$(obj)/bootloader: $(src)/bootloader.lds $(obj)/bootloader.o $(obj)/fw-emu.o \
- lib/lib.a arch/ia64/lib/lib.a FORCE
- $(call if_changed,ld)
+++ /dev/null
-/*
- * arch/ia64/boot/bootloader.c
- *
- * Loads an ELF kernel.
- *
- * Copyright (C) 1998-2002 Hewlett-Packard Co
- * David Mosberger-Tang <davidm@hpl.hp.com>
- * Stephane Eranian <eranian@hpl.hp.com>
- *
- * 01/07/99 S.Eranian modified to pass command line arguments to kernel
- */
-struct task_struct; /* forward declaration for elf.h */
-
-#include <linux/config.h>
-#include <linux/elf.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-
-#include <asm/elf.h>
-#include <asm/pal.h>
-#include <asm/pgtable.h>
-#include <asm/sal.h>
-#include <asm/system.h>
-#include <asm/intrinsics.h>
-
-/* Simulator system calls: */
-
-#define SSC_CONSOLE_INIT 20
-#define SSC_GETCHAR 21
-#define SSC_PUTCHAR 31
-#define SSC_OPEN 50
-#define SSC_CLOSE 51
-#define SSC_READ 52
-#define SSC_WRITE 53
-#define SSC_GET_COMPLETION 54
-#define SSC_WAIT_COMPLETION 55
-#define SSC_CONNECT_INTERRUPT 58
-#define SSC_GENERATE_INTERRUPT 59
-#define SSC_SET_PERIODIC_INTERRUPT 60
-#define SSC_GET_RTC 65
-#define SSC_EXIT 66
-#define SSC_LOAD_SYMBOLS 69
-#define SSC_GET_TOD 74
-
-#define SSC_GET_ARGS 75
-
-struct disk_req {
- unsigned long addr;
- unsigned len;
-};
-
-struct disk_stat {
- int fd;
- unsigned count;
-};
-
-#include "../kernel/fw-emu.c"
-extern void jmp_to_kernel(ulong sp, ulong bp, ulong e_entry);
-extern void __bsw1(void);
-
-
-/*
- * Set a break point on this function so that symbols are available to set breakpoints in
- * the kernel being debugged.
- */
-static void
-debug_break (void)
-{
-}
-
-static void
-cons_write (const char *buf)
-{
- unsigned long ch;
-
- while ((ch = *buf++) != '\0') {
- ssc(ch, 0, 0, 0, SSC_PUTCHAR);
- if (ch == '\n')
- ssc('\r', 0, 0, 0, SSC_PUTCHAR);
- }
-}
-
-#define MAX_ARGS 32
-
-void
-_start (void)
-{
- static char stack[16384] __attribute__ ((aligned (16)));
- static char mem[4096];
- static char buffer[1024];
- unsigned long off;
- int fd, i;
- struct disk_req req;
- struct disk_stat stat;
- struct elfhdr *elf;
- struct elf_phdr *elf_phdr; /* program header */
- unsigned long e_entry, e_phoff, e_phnum;
- register struct ia64_boot_param *bp;
- char *kpath, *args;
- long arglen = 0;
-
- extern __u64 __gp;
- register unsigned long tmp = (unsigned long) &stack[0];
-
- ia64_setreg(_IA64_REG_GP, __gp);
- ia64_setreg(_IA64_REG_SP, tmp);
- __bsw1();
-
- ssc(0, 0, 0, 0, SSC_CONSOLE_INIT);
-
- /*
- * S.Eranian: extract the commandline argument from the simulator
- *
- * The expected format is as follows:
- *
- * kernelname args...
- *
- * Both are optional but you can't have the second one without the first.
- */
- arglen = ssc((long) buffer, 0, 0, 0, SSC_GET_ARGS);
-
- kpath = "vmlinux";
- args = buffer;
- if (arglen > 0) {
- kpath = buffer;
- while (*args != ' ' && *args != '\0')
- ++args, --arglen;
- if (*args == ' ')
- *args++ = '\0', --arglen;
- }
-
- if (arglen <= 0) {
- args = "";
- arglen = 1;
- }
-
- fd = ssc((long) kpath, 1, 0, 0, SSC_OPEN);
-
- if (fd < 0) {
- cons_write(kpath);
- cons_write(": file not found, reboot now\n");
- for(;;);
- }
- stat.fd = fd;
- off = 0;
-
- req.len = sizeof(mem);
- req.addr = (long) mem;
- ssc(fd, 1, (long) &req, off, SSC_READ);
- ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
-
- elf = (struct elfhdr *) mem;
- if (elf->e_ident[0] == 0x7f && strncmp(elf->e_ident + 1, "ELF", 3) != 0) {
- cons_write("not an ELF file\n");
- return;
- }
- if (elf->e_type != ET_EXEC) {
- cons_write("not an ELF executable\n");
- return;
- }
- if (!elf_check_arch(elf)) {
- cons_write("kernel not for this processor\n");
- return;
- }
-
- e_entry = elf->e_entry;
- e_phnum = elf->e_phnum;
- e_phoff = elf->e_phoff;
-
- cons_write("loading ");
- cons_write(kpath);
- cons_write("...\n");
-
- for (i = 0; i < e_phnum; ++i) {
- req.len = sizeof(*elf_phdr);
- req.addr = (long) mem;
- ssc(fd, 1, (long) &req, e_phoff, SSC_READ);
- ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
- if (stat.count != sizeof(*elf_phdr)) {
- cons_write("failed to read phdr\n");
- return;
- }
- e_phoff += sizeof(*elf_phdr);
-
- elf_phdr = (struct elf_phdr *) mem;
-
- if (elf_phdr->p_type != PT_LOAD)
- continue;
-
- req.len = elf_phdr->p_filesz;
- req.addr = __pa(elf_phdr->p_paddr);
- ssc(fd, 1, (long) &req, elf_phdr->p_offset, SSC_READ);
- ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
- memset((char *)__pa(elf_phdr->p_paddr) + elf_phdr->p_filesz, 0,
- elf_phdr->p_memsz - elf_phdr->p_filesz);
- }
- ssc(fd, 0, 0, 0, SSC_CLOSE);
-
- cons_write("starting kernel...\n");
-
- /* fake an I/O base address: */
- ia64_setreg(_IA64_REG_AR_KR0, 0xffffc000000UL);
-
- bp = sys_fw_init(args, arglen);
-
- ssc(0, (long) kpath, 0, 0, SSC_LOAD_SYMBOLS);
-
- debug_break();
- tmp = __pa(&stack);
- jmp_to_kernel(tmp, (unsigned long) bp, e_entry);
-
- cons_write("kernel returned!\n");
- ssc(-1, 0, 0, 0, SSC_EXIT);
-}
+++ /dev/null
-OUTPUT_FORMAT("elf64-ia64-little")
-OUTPUT_ARCH(ia64)
-ENTRY(_start)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = 0x100000;
-
- _text = .;
- .text : { *(__ivt_section) *(.text) }
- _etext = .;
-
- /* Global data */
- _data = .;
- .rodata : { *(.rodata) *(.rodata.*) }
- .data : { *(.data) *(.gnu.linkonce.d*) CONSTRUCTORS }
- __gp = ALIGN (8) + 0x200000;
- .got : { *(.got.plt) *(.got) }
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- .sdata : { *(.sdata) }
- _edata = .;
-
- _bss = .;
- .sbss : { *(.sbss) *(.scommon) }
- .bss : { *(.bss) *(COMMON) }
- . = ALIGN(64 / 8);
- _end = . ;
-
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- /* DWARF debug sections.
- Symbols in the DWARF debugging sections are relative to the beginning
- of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
- /* These must appear regardless of . */
-}
--- /dev/null
+#
+# ia64/boot/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License. See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1998 by David Mosberger-Tang <davidm@hpl.hp.com>
+#
+
+targets-$(CONFIG_IA64_HP_SIM) += bootloader
+targets := vmlinux.bin vmlinux.gz $(targets-y)
+
+quiet_cmd_cptotop = LN $@
+ cmd_cptotop = ln -f $< $@
+
+vmlinux.gz: $(obj)/vmlinux.gz $(addprefix $(obj)/,$(targets-y))
+ $(call cmd,cptotop)
+ @echo ' Kernel: $@ is ready'
+
+boot: bootloader
+
+bootloader: $(obj)/bootloader
+ $(call cmd,cptotop)
+
+$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,gzip)
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+ $(call if_changed,objcopy)
+
+
+LDFLAGS_bootloader = -static -T
+
+$(obj)/bootloader: $(src)/bootloader.lds $(obj)/bootloader.o $(obj)/fw-emu.o \
+ lib/lib.a arch/ia64/lib/lib.a FORCE
+ $(call if_changed,ld)
--- /dev/null
+/*
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+
+#include <asm/asmmacro.h>
+
+ .bss
+ .align 16
+stack_mem:
+ .skip 16834
+
+ .text
+
+/* This needs to be defined because lib/string.c:strlcat() calls it in case of error... */
+GLOBAL_ENTRY(printk)
+ break 0
+END(printk)
+
+GLOBAL_ENTRY(_start)
+ .prologue
+ .save rp, r0
+ .body
+ movl gp = __gp
+ movl sp = stack_mem
+ bsw.1
+ br.call.sptk.many rp=start_bootloader
+END(_start)
+
+GLOBAL_ENTRY(ssc)
+ .regstk 5,0,0,0
+ mov r15=in4
+ break 0x80001
+ br.ret.sptk.many b0
+END(ssc)
+
+GLOBAL_ENTRY(jmp_to_kernel)
+ .regstk 2,0,0,0
+ mov r28=in0
+ mov b7=in1
+ br.sptk.few b7
+END(jmp_to_kernel)
+
+
+GLOBAL_ENTRY(pal_emulator_static)
+ mov r8=-1
+ mov r9=256
+ ;;
+ cmp.gtu p6,p7=r9,r28 /* r28 <= 255? */
+(p6) br.cond.sptk.few static
+ ;;
+ mov r9=512
+ ;;
+ cmp.gtu p6,p7=r9,r28
+(p6) br.cond.sptk.few stacked
+ ;;
+static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
+(p7) br.cond.sptk.few 1f
+ ;;
+ mov r8=0 /* status = 0 */
+ movl r9=0x100000000 /* tc.base */
+ movl r10=0x0000000200000003 /* count[0], count[1] */
+ movl r11=0x1000000000002000 /* stride[0], stride[1] */
+ br.cond.sptk.few rp
+1: cmp.eq p6,p7=14,r28 /* PAL_FREQ_RATIOS */
+(p7) br.cond.sptk.few 1f
+ mov r8=0 /* status = 0 */
+ movl r9 =0x100000064 /* proc_ratio (1/100) */
+ movl r10=0x100000100 /* bus_ratio<<32 (1/256) */
+ movl r11=0x100000064 /* itc_ratio<<32 (1/100) */
+ ;;
+1: cmp.eq p6,p7=19,r28 /* PAL_RSE_INFO */
+(p7) br.cond.sptk.few 1f
+ mov r8=0 /* status = 0 */
+ mov r9=96 /* num phys stacked */
+ mov r10=0 /* hints */
+ mov r11=0
+ br.cond.sptk.few rp
+1: cmp.eq p6,p7=1,r28 /* PAL_CACHE_FLUSH */
+(p7) br.cond.sptk.few 1f
+ mov r9=ar.lc
+ movl r8=524288 /* flush 512k million cache lines (16MB) */
+ ;;
+ mov ar.lc=r8
+ movl r8=0xe000000000000000
+ ;;
+.loop: fc r8
+ add r8=32,r8
+ br.cloop.sptk.few .loop
+ sync.i
+ ;;
+ srlz.i
+ ;;
+ mov ar.lc=r9
+ mov r8=r0
+ ;;
+1: cmp.eq p6,p7=15,r28 /* PAL_PERF_MON_INFO */
+(p7) br.cond.sptk.few 1f
+ mov r8=0 /* status = 0 */
+ movl r9 =0x12082004 /* generic=4 width=32 retired=8 cycles=18 */
+ mov r10=0 /* reserved */
+ mov r11=0 /* reserved */
+ mov r16=0xffff /* implemented PMC */
+ mov r17=0xffff /* implemented PMD */
+ add r18=8,r29 /* second index */
+ ;;
+ st8 [r29]=r16,16 /* store implemented PMC */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+ st8 [r29]=r0,16 /* store implemented PMC */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+ st8 [r29]=r17,16 /* store implemented PMD */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ mov r16=0xf0 /* cycles count capable PMC */
+ ;;
+ st8 [r29]=r0,16 /* store implemented PMC */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ mov r17=0x10 /* retired bundles capable PMC */
+ ;;
+ st8 [r29]=r16,16 /* store cycles capable */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+ st8 [r29]=r0,16 /* store implemented PMC */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+ st8 [r29]=r17,16 /* store retired bundle capable */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+ st8 [r29]=r0,16 /* store implemented PMC */
+ st8 [r18]=r0,16 /* clear remaining bits */
+ ;;
+1: br.cond.sptk.few rp
+stacked:
+ br.ret.sptk.few rp
+END(pal_emulator_static)
--- /dev/null
+/*
+ * arch/ia64/boot/bootloader.c
+ *
+ * Loads an ELF kernel.
+ *
+ * Copyright (C) 1998-2002 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
+ * Stephane Eranian <eranian@hpl.hp.com>
+ *
+ * 01/07/99 S.Eranian modified to pass command line arguments to kernel
+ */
+struct task_struct; /* forward declaration for elf.h */
+
+#include <linux/config.h>
+#include <linux/elf.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+
+#include <asm/elf.h>
+#include <asm/pal.h>
+#include <asm/pgtable.h>
+#include <asm/sal.h>
+#include <asm/system.h>
+#include <asm/intrinsics.h>
+
+/* Simulator system calls: */
+
+#define SSC_CONSOLE_INIT 20
+#define SSC_GETCHAR 21
+#define SSC_PUTCHAR 31
+#define SSC_OPEN 50
+#define SSC_CLOSE 51
+#define SSC_READ 52
+#define SSC_WRITE 53
+#define SSC_GET_COMPLETION 54
+#define SSC_WAIT_COMPLETION 55
+#define SSC_CONNECT_INTERRUPT 58
+#define SSC_GENERATE_INTERRUPT 59
+#define SSC_SET_PERIODIC_INTERRUPT 60
+#define SSC_GET_RTC 65
+#define SSC_EXIT 66
+#define SSC_LOAD_SYMBOLS 69
+#define SSC_GET_TOD 74
+
+#define SSC_GET_ARGS 75
+
+struct disk_req {
+ unsigned long addr;
+ unsigned len;
+};
+
+struct disk_stat {
+ int fd;
+ unsigned count;
+};
+
+#include "../kernel/fw-emu.c"
+extern void jmp_to_kernel(ulong sp, ulong bp, ulong e_entry);
+extern void __bsw1(void);
+
+
+/*
+ * Set a break point on this function so that symbols are available to set breakpoints in
+ * the kernel being debugged.
+ */
+static void
+debug_break (void)
+{
+}
+
+static void
+cons_write (const char *buf)
+{
+ unsigned long ch;
+
+ while ((ch = *buf++) != '\0') {
+ ssc(ch, 0, 0, 0, SSC_PUTCHAR);
+ if (ch == '\n')
+ ssc('\r', 0, 0, 0, SSC_PUTCHAR);
+ }
+}
+
+#define MAX_ARGS 32
+
+void
+_start (void)
+{
+ static char stack[16384] __attribute__ ((aligned (16)));
+ static char mem[4096];
+ static char buffer[1024];
+ unsigned long off;
+ int fd, i;
+ struct disk_req req;
+ struct disk_stat stat;
+ struct elfhdr *elf;
+ struct elf_phdr *elf_phdr; /* program header */
+ unsigned long e_entry, e_phoff, e_phnum;
+ register struct ia64_boot_param *bp;
+ char *kpath, *args;
+ long arglen = 0;
+
+ extern __u64 __gp;
+ register unsigned long tmp = (unsigned long) &stack[0];
+
+ ia64_setreg(_IA64_REG_GP, __gp);
+ ia64_setreg(_IA64_REG_SP, tmp);
+ __bsw1();
+
+ ssc(0, 0, 0, 0, SSC_CONSOLE_INIT);
+
+ /*
+ * S.Eranian: extract the commandline argument from the simulator
+ *
+ * The expected format is as follows:
+ *
+ * kernelname args...
+ *
+ * Both are optional but you can't have the second one without the first.
+ */
+ arglen = ssc((long) buffer, 0, 0, 0, SSC_GET_ARGS);
+
+ kpath = "vmlinux";
+ args = buffer;
+ if (arglen > 0) {
+ kpath = buffer;
+ while (*args != ' ' && *args != '\0')
+ ++args, --arglen;
+ if (*args == ' ')
+ *args++ = '\0', --arglen;
+ }
+
+ if (arglen <= 0) {
+ args = "";
+ arglen = 1;
+ }
+
+ fd = ssc((long) kpath, 1, 0, 0, SSC_OPEN);
+
+ if (fd < 0) {
+ cons_write(kpath);
+ cons_write(": file not found, reboot now\n");
+ for(;;);
+ }
+ stat.fd = fd;
+ off = 0;
+
+ req.len = sizeof(mem);
+ req.addr = (long) mem;
+ ssc(fd, 1, (long) &req, off, SSC_READ);
+ ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
+
+ elf = (struct elfhdr *) mem;
+ if (elf->e_ident[0] == 0x7f && strncmp(elf->e_ident + 1, "ELF", 3) != 0) {
+ cons_write("not an ELF file\n");
+ return;
+ }
+ if (elf->e_type != ET_EXEC) {
+ cons_write("not an ELF executable\n");
+ return;
+ }
+ if (!elf_check_arch(elf)) {
+ cons_write("kernel not for this processor\n");
+ return;
+ }
+
+ e_entry = elf->e_entry;
+ e_phnum = elf->e_phnum;
+ e_phoff = elf->e_phoff;
+
+ cons_write("loading ");
+ cons_write(kpath);
+ cons_write("...\n");
+
+ for (i = 0; i < e_phnum; ++i) {
+ req.len = sizeof(*elf_phdr);
+ req.addr = (long) mem;
+ ssc(fd, 1, (long) &req, e_phoff, SSC_READ);
+ ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
+ if (stat.count != sizeof(*elf_phdr)) {
+ cons_write("failed to read phdr\n");
+ return;
+ }
+ e_phoff += sizeof(*elf_phdr);
+
+ elf_phdr = (struct elf_phdr *) mem;
+
+ if (elf_phdr->p_type != PT_LOAD)
+ continue;
+
+ req.len = elf_phdr->p_filesz;
+ req.addr = __pa(elf_phdr->p_paddr);
+ ssc(fd, 1, (long) &req, elf_phdr->p_offset, SSC_READ);
+ ssc((long) &stat, 0, 0, 0, SSC_WAIT_COMPLETION);
+ memset((char *)__pa(elf_phdr->p_paddr) + elf_phdr->p_filesz, 0,
+ elf_phdr->p_memsz - elf_phdr->p_filesz);
+ }
+ ssc(fd, 0, 0, 0, SSC_CLOSE);
+
+ cons_write("starting kernel...\n");
+
+ /* fake an I/O base address: */
+ ia64_setreg(_IA64_REG_AR_KR0, 0xffffc000000UL);
+
+ bp = sys_fw_init(args, arglen);
+
+ ssc(0, (long) kpath, 0, 0, SSC_LOAD_SYMBOLS);
+
+ debug_break();
+ tmp = __pa(&stack);
+ jmp_to_kernel(tmp, (unsigned long) bp, e_entry);
+
+ cons_write("kernel returned!\n");
+ ssc(-1, 0, 0, 0, SSC_EXIT);
+}
--- /dev/null
+OUTPUT_FORMAT("elf64-ia64-little")
+OUTPUT_ARCH(ia64)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = 0x100000;
+
+ _text = .;
+ .text : { *(__ivt_section) *(.text) }
+ _etext = .;
+
+ /* Global data */
+ _data = .;
+ .rodata : { *(.rodata) *(.rodata.*) }
+ .data : { *(.data) *(.gnu.linkonce.d*) CONSTRUCTORS }
+ __gp = ALIGN (8) + 0x200000;
+ .got : { *(.got.plt) *(.got) }
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ .sdata : { *(.sdata) }
+ _edata = .;
+
+ _bss = .;
+ .sbss : { *(.sbss) *(.scommon) }
+ .bss : { *(.bss) *(COMMON) }
+ . = ALIGN(64 / 8);
+ _end = . ;
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* These must appear regardless of . */
+}
--- /dev/null
+/*
+ * PAL & SAL emulation.
+ *
+ * Copyright (C) 1998-2001 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+#include <linux/config.h>
+
+#ifdef CONFIG_PCI
+# include <linux/pci.h>
+#endif
+
+#include <linux/efi.h>
+#include <asm/io.h>
+#include <asm/pal.h>
+#include <asm/sal.h>
+
+#include "ssc.h"
+
+#define MB (1024*1024UL)
+
+#define SIMPLE_MEMMAP 1
+
+#if SIMPLE_MEMMAP
+# define NUM_MEM_DESCS 4
+#else
+# define NUM_MEM_DESCS 16
+#endif
+
+static char fw_mem[( sizeof(struct ia64_boot_param)
+ + sizeof(efi_system_table_t)
+ + sizeof(efi_runtime_services_t)
+ + 1*sizeof(efi_config_table_t)
+ + sizeof(struct ia64_sal_systab)
+ + sizeof(struct ia64_sal_desc_entry_point)
+ + NUM_MEM_DESCS*(sizeof(efi_memory_desc_t))
+ + 1024)] __attribute__ ((aligned (8)));
+
+#define SECS_PER_HOUR (60 * 60)
+#define SECS_PER_DAY (SECS_PER_HOUR * 24)
+
+/* Compute the `struct tm' representation of *T,
+ offset OFFSET seconds east of UTC,
+ and store year, yday, mon, mday, wday, hour, min, sec into *TP.
+ Return nonzero if successful. */
+int
+offtime (unsigned long t, efi_time_t *tp)
+{
+ const unsigned short int __mon_yday[2][13] =
+ {
+ /* Normal years. */
+ { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
+ /* Leap years. */
+ { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
+ };
+ long int days, rem, y;
+ const unsigned short int *ip;
+
+ days = t / SECS_PER_DAY;
+ rem = t % SECS_PER_DAY;
+ while (rem < 0) {
+ rem += SECS_PER_DAY;
+ --days;
+ }
+ while (rem >= SECS_PER_DAY) {
+ rem -= SECS_PER_DAY;
+ ++days;
+ }
+ tp->hour = rem / SECS_PER_HOUR;
+ rem %= SECS_PER_HOUR;
+ tp->minute = rem / 60;
+ tp->second = rem % 60;
+ /* January 1, 1970 was a Thursday. */
+ y = 1970;
+
+# define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
+# define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
+# define __isleap(year) \
+ ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
+
+ while (days < 0 || days >= (__isleap (y) ? 366 : 365)) {
+ /* Guess a corrected year, assuming 365 days per year. */
+ long int yg = y + days / 365 - (days % 365 < 0);
+
+ /* Adjust DAYS and Y to match the guessed year. */
+ days -= ((yg - y) * 365 + LEAPS_THRU_END_OF (yg - 1)
+ - LEAPS_THRU_END_OF (y - 1));
+ y = yg;
+ }
+ tp->year = y;
+ ip = __mon_yday[__isleap(y)];
+ for (y = 11; days < (long int) ip[y]; --y)
+ continue;
+ days -= ip[y];
+ tp->month = y + 1;
+ tp->day = days + 1;
+ return 1;
+}
+
+extern void pal_emulator_static (void);
+
+/* Macro to emulate SAL call using legacy IN and OUT calls to CF8, CFC etc.. */
+
+#define BUILD_CMD(addr) ((0x80000000 | (addr)) & ~3)
+
+#define REG_OFFSET(addr) (0x00000000000000FF & (addr))
+#define DEVICE_FUNCTION(addr) (0x000000000000FF00 & (addr))
+#define BUS_NUMBER(addr) (0x0000000000FF0000 & (addr))
+
+static efi_status_t
+efi_get_time (efi_time_t *tm, efi_time_cap_t *tc)
+{
+#if defined(CONFIG_IA64_HP_SIM) || defined(CONFIG_IA64_GENERIC)
+ struct {
+ int tv_sec; /* must be 32bits to work */
+ int tv_usec;
+ } tv32bits;
+
+ ssc((unsigned long) &tv32bits, 0, 0, 0, SSC_GET_TOD);
+
+ memset(tm, 0, sizeof(*tm));
+ offtime(tv32bits.tv_sec, tm);
+
+ if (tc)
+ memset(tc, 0, sizeof(*tc));
+#else
+# error Not implemented yet...
+#endif
+ return EFI_SUCCESS;
+}
+
+static void
+efi_reset_system (int reset_type, efi_status_t status, unsigned long data_size, efi_char16_t *data)
+{
+#if defined(CONFIG_IA64_HP_SIM) || defined(CONFIG_IA64_GENERIC)
+ ssc(status, 0, 0, 0, SSC_EXIT);
+#else
+# error Not implemented yet...
+#endif
+}
+
+static efi_status_t
+efi_unimplemented (void)
+{
+ return EFI_UNSUPPORTED;
+}
+
+static struct sal_ret_values
+sal_emulator (long index, unsigned long in1, unsigned long in2,
+ unsigned long in3, unsigned long in4, unsigned long in5,
+ unsigned long in6, unsigned long in7)
+{
+ long r9 = 0;
+ long r10 = 0;
+ long r11 = 0;
+ long status;
+
+ /*
+ * Don't do a "switch" here since that gives us code that
+ * isn't self-relocatable.
+ */
+ status = 0;
+ if (index == SAL_FREQ_BASE) {
+ switch (in1) {
+ case SAL_FREQ_BASE_PLATFORM:
+ r9 = 200000000;
+ break;
+
+ case SAL_FREQ_BASE_INTERVAL_TIMER:
+ /*
+ * Is this supposed to be the cr.itc frequency
+ * or something platform specific? The SAL
+ * doc ain't exactly clear on this...
+ */
+ r9 = 700000000;
+ break;
+
+ case SAL_FREQ_BASE_REALTIME_CLOCK:
+ r9 = 1;
+ break;
+
+ default:
+ status = -1;
+ break;
+ }
+ } else if (index == SAL_SET_VECTORS) {
+ ;
+ } else if (index == SAL_GET_STATE_INFO) {
+ ;
+ } else if (index == SAL_GET_STATE_INFO_SIZE) {
+ ;
+ } else if (index == SAL_CLEAR_STATE_INFO) {
+ ;
+ } else if (index == SAL_MC_RENDEZ) {
+ ;
+ } else if (index == SAL_MC_SET_PARAMS) {
+ ;
+ } else if (index == SAL_CACHE_FLUSH) {
+ ;
+ } else if (index == SAL_CACHE_INIT) {
+ ;
+#ifdef CONFIG_PCI
+ } else if (index == SAL_PCI_CONFIG_READ) {
+ /*
+ * in1 contains the PCI configuration address and in2
+ * the size of the read. The value that is read is
+ * returned via the general register r9.
+ */
+ outl(BUILD_CMD(in1), 0xCF8);
+ if (in2 == 1) /* Reading byte */
+ r9 = inb(0xCFC + ((REG_OFFSET(in1) & 3)));
+ else if (in2 == 2) /* Reading word */
+ r9 = inw(0xCFC + ((REG_OFFSET(in1) & 2)));
+ else /* Reading dword */
+ r9 = inl(0xCFC);
+ status = PCIBIOS_SUCCESSFUL;
+ } else if (index == SAL_PCI_CONFIG_WRITE) {
+ /*
+ * in1 contains the PCI configuration address, in2 the
+ * size of the write, and in3 the actual value to be
+ * written out.
+ */
+ outl(BUILD_CMD(in1), 0xCF8);
+ if (in2 == 1) /* Writing byte */
+ outb(in3, 0xCFC + ((REG_OFFSET(in1) & 3)));
+ else if (in2 == 2) /* Writing word */
+ outw(in3, 0xCFC + ((REG_OFFSET(in1) & 2)));
+ else /* Writing dword */
+ outl(in3, 0xCFC);
+ status = PCIBIOS_SUCCESSFUL;
+#endif /* CONFIG_PCI */
+ } else if (index == SAL_UPDATE_PAL) {
+ ;
+ } else {
+ status = -1;
+ }
+ return ((struct sal_ret_values) {status, r9, r10, r11});
+}
+
+
+/*
+ * This is here to work around a bug in egcs-1.1.1b that causes the
+ * compiler to crash (seems like a bug in the new alias analysis code.
+ */
+void *
+id (long addr)
+{
+ return (void *) addr;
+}
+
+struct ia64_boot_param *
+sys_fw_init (const char *args, int arglen)
+{
+ efi_system_table_t *efi_systab;
+ efi_runtime_services_t *efi_runtime;
+ efi_config_table_t *efi_tables;
+ struct ia64_sal_systab *sal_systab;
+ efi_memory_desc_t *efi_memmap, *md;
+ unsigned long *pal_desc, *sal_desc;
+ struct ia64_sal_desc_entry_point *sal_ed;
+ struct ia64_boot_param *bp;
+ unsigned char checksum = 0;
+ char *cp, *cmd_line;
+ int i = 0;
+# define MAKE_MD(typ, attr, start, end) \
+ do { \
+ md = efi_memmap + i++; \
+ md->type = typ; \
+ md->pad = 0; \
+ md->phys_addr = start; \
+ md->virt_addr = 0; \
+ md->num_pages = (end - start) >> 12; \
+ md->attribute = attr; \
+ } while (0)
+
+ memset(fw_mem, 0, sizeof(fw_mem));
+
+ pal_desc = (unsigned long *) &pal_emulator_static;
+ sal_desc = (unsigned long *) &sal_emulator;
+
+ cp = fw_mem;
+ efi_systab = (void *) cp; cp += sizeof(*efi_systab);
+ efi_runtime = (void *) cp; cp += sizeof(*efi_runtime);
+ efi_tables = (void *) cp; cp += sizeof(*efi_tables);
+ sal_systab = (void *) cp; cp += sizeof(*sal_systab);
+ sal_ed = (void *) cp; cp += sizeof(*sal_ed);
+ efi_memmap = (void *) cp; cp += NUM_MEM_DESCS*sizeof(*efi_memmap);
+ bp = (void *) cp; cp += sizeof(*bp);
+ cmd_line = (void *) cp;
+
+ if (args) {
+ if (arglen >= 1024)
+ arglen = 1023;
+ memcpy(cmd_line, args, arglen);
+ } else {
+ arglen = 0;
+ }
+ cmd_line[arglen] = '\0';
+
+ memset(efi_systab, 0, sizeof(efi_systab));
+ efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
+ efi_systab->hdr.revision = EFI_SYSTEM_TABLE_REVISION;
+ efi_systab->hdr.headersize = sizeof(efi_systab->hdr);
+ efi_systab->fw_vendor = __pa("H\0e\0w\0l\0e\0t\0t\0-\0P\0a\0c\0k\0a\0r\0d\0\0");
+ efi_systab->fw_revision = 1;
+ efi_systab->runtime = (void *) __pa(efi_runtime);
+ efi_systab->nr_tables = 1;
+ efi_systab->tables = __pa(efi_tables);
+
+ efi_runtime->hdr.signature = EFI_RUNTIME_SERVICES_SIGNATURE;
+ efi_runtime->hdr.revision = EFI_RUNTIME_SERVICES_REVISION;
+ efi_runtime->hdr.headersize = sizeof(efi_runtime->hdr);
+ efi_runtime->get_time = __pa(&efi_get_time);
+ efi_runtime->set_time = __pa(&efi_unimplemented);
+ efi_runtime->get_wakeup_time = __pa(&efi_unimplemented);
+ efi_runtime->set_wakeup_time = __pa(&efi_unimplemented);
+ efi_runtime->set_virtual_address_map = __pa(&efi_unimplemented);
+ efi_runtime->get_variable = __pa(&efi_unimplemented);
+ efi_runtime->get_next_variable = __pa(&efi_unimplemented);
+ efi_runtime->set_variable = __pa(&efi_unimplemented);
+ efi_runtime->get_next_high_mono_count = __pa(&efi_unimplemented);
+ efi_runtime->reset_system = __pa(&efi_reset_system);
+
+ efi_tables->guid = SAL_SYSTEM_TABLE_GUID;
+ efi_tables->table = __pa(sal_systab);
+
+ /* fill in the SAL system table: */
+ memcpy(sal_systab->signature, "SST_", 4);
+ sal_systab->size = sizeof(*sal_systab);
+ sal_systab->sal_rev_minor = 1;
+ sal_systab->sal_rev_major = 0;
+ sal_systab->entry_count = 1;
+
+#ifdef CONFIG_IA64_GENERIC
+ strcpy(sal_systab->oem_id, "Generic");
+ strcpy(sal_systab->product_id, "IA-64 system");
+#endif
+
+#ifdef CONFIG_IA64_HP_SIM
+ strcpy(sal_systab->oem_id, "Hewlett-Packard");
+ strcpy(sal_systab->product_id, "HP-simulator");
+#endif
+
+#ifdef CONFIG_IA64_SDV
+ strcpy(sal_systab->oem_id, "Intel");
+ strcpy(sal_systab->product_id, "SDV");
+#endif
+
+ /* fill in an entry point: */
+ sal_ed->type = SAL_DESC_ENTRY_POINT;
+ sal_ed->pal_proc = __pa(pal_desc[0]);
+ sal_ed->sal_proc = __pa(sal_desc[0]);
+ sal_ed->gp = __pa(sal_desc[1]);
+
+ for (cp = (char *) sal_systab; cp < (char *) efi_memmap; ++cp)
+ checksum += *cp;
+
+ sal_systab->checksum = -checksum;
+
+#if SIMPLE_MEMMAP
+ /* simulate free memory at physical address zero */
+ MAKE_MD(EFI_BOOT_SERVICES_DATA, EFI_MEMORY_WB, 0*MB, 1*MB);
+ MAKE_MD(EFI_PAL_CODE, EFI_MEMORY_WB, 1*MB, 2*MB);
+ MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 2*MB, 130*MB);
+ MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 4096*MB, 4128*MB);
+#else
+ MAKE_MD( 4, 0x9, 0x0000000000000000, 0x0000000000001000);
+ MAKE_MD( 7, 0x9, 0x0000000000001000, 0x000000000008a000);
+ MAKE_MD( 4, 0x9, 0x000000000008a000, 0x00000000000a0000);
+ MAKE_MD( 5, 0x8000000000000009, 0x00000000000c0000, 0x0000000000100000);
+ MAKE_MD( 7, 0x9, 0x0000000000100000, 0x0000000004400000);
+ MAKE_MD( 2, 0x9, 0x0000000004400000, 0x0000000004be5000);
+ MAKE_MD( 7, 0x9, 0x0000000004be5000, 0x000000007f77e000);
+ MAKE_MD( 6, 0x8000000000000009, 0x000000007f77e000, 0x000000007fb94000);
+ MAKE_MD( 6, 0x8000000000000009, 0x000000007fb94000, 0x000000007fb95000);
+ MAKE_MD( 6, 0x8000000000000009, 0x000000007fb95000, 0x000000007fc00000);
+ MAKE_MD(13, 0x8000000000000009, 0x000000007fc00000, 0x000000007fc3a000);
+ MAKE_MD( 7, 0x9, 0x000000007fc3a000, 0x000000007fea0000);
+ MAKE_MD( 5, 0x8000000000000009, 0x000000007fea0000, 0x000000007fea8000);
+ MAKE_MD( 7, 0x9, 0x000000007fea8000, 0x000000007feab000);
+ MAKE_MD( 5, 0x8000000000000009, 0x000000007feab000, 0x000000007ffff000);
+ MAKE_MD( 7, 0x9, 0x00000000ff400000, 0x0000000104000000);
+#endif
+
+ bp->efi_systab = __pa(&fw_mem);
+ bp->efi_memmap = __pa(efi_memmap);
+ bp->efi_memmap_size = NUM_MEM_DESCS*sizeof(efi_memory_desc_t);
+ bp->efi_memdesc_size = sizeof(efi_memory_desc_t);
+ bp->efi_memdesc_version = 1;
+ bp->command_line = __pa(cmd_line);
+ bp->console_info.num_cols = 80;
+ bp->console_info.num_rows = 25;
+ bp->console_info.orig_x = 0;
+ bp->console_info.orig_y = 24;
+ bp->fpswa = 0;
+
+ return bp;
+}
--- /dev/null
+/*
+ * Copyright (C) 1998-2003 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
+ * Stephane Eranian <eranian@hpl.hp.com>
+ */
+#ifndef ssc_h
+#define ssc_h
+
+/* Simulator system calls: */
+
+#define SSC_CONSOLE_INIT 20
+#define SSC_GETCHAR 21
+#define SSC_PUTCHAR 31
+#define SSC_OPEN 50
+#define SSC_CLOSE 51
+#define SSC_READ 52
+#define SSC_WRITE 53
+#define SSC_GET_COMPLETION 54
+#define SSC_WAIT_COMPLETION 55
+#define SSC_CONNECT_INTERRUPT 58
+#define SSC_GENERATE_INTERRUPT 59
+#define SSC_SET_PERIODIC_INTERRUPT 60
+#define SSC_GET_RTC 65
+#define SSC_EXIT 66
+#define SSC_LOAD_SYMBOLS 69
+#define SSC_GET_TOD 74
+
+#define SSC_GET_ARGS 75
+
+/*
+ * Simulator system call.
+ */
+extern long ssc (long arg0, long arg1, long arg2, long arg3, int nr);
+
+#endif /* ssc_h */
break 0x80001
br.ret.sptk.many rp
END(ia64_ssc)
-
#include <linux/wait.h>
#include <linux/compat.h>
+#include <asm/intrinsics.h>
#include <asm/uaccess.h>
#include <asm/rse.h>
#include <asm/sigcontext.h>
#define __IA32_NR_sigreturn 119
#define __IA32_NR_rt_sigreturn 173
-#include <asm/intrinsics.h>
#ifdef ASM_SUPPORTED
+/*
+ * Don't let GCC uses f16-f31 so that save_ia32_fpstate_live() and
+ * restore_ia32_fpstate_live() can be sure the live register contain user-level state.
+ */
register double f16 asm ("f16"); register double f17 asm ("f17");
register double f18 asm ("f18"); register double f19 asm ("f19");
register double f20 asm ("f20"); register double f21 asm ("f21");
if (!access_ok(VERIFY_WRITE, save, sizeof(*save)))
return -EFAULT;
- /* Readin fsr, fcr, fir, fdr and copy onto fpstate */
+ /* Read in fsr, fcr, fir, fdr and copy onto fpstate */
fsr = ia64_getreg(_IA64_REG_AR_FSR);
fcr = ia64_getreg(_IA64_REG_AR_FCR);
fir = ia64_getreg(_IA64_REG_AR_FIR);
#include <linux/personality.h>
#include <linux/sched.h>
+#include <asm/intrinsics.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/processor.h>
-#include <asm/intrinsics.h>
#include "ia32priv.h"
#include "ia32priv.h"
-#include <asm/ptrace.h>
#include <asm/intrinsics.h>
+#include <asm/ptrace.h>
int
ia32_intercept (struct pt_regs *regs, unsigned long isr)
extern void ia32_load_segment_descriptors (struct task_struct *task);
#define ia32f2ia64f(dst,src) \
-do { \
- ia64_ldfe(6,src); \
+do { \
+ ia64_ldfe(6,src); \
ia64_stop(); \
ia64_stf_spill(dst, 6); \
} while(0)
do { \
ia64_ldf_fill(6, src); \
ia64_stop(); \
- ia64_stfe(dst, 6); \
+ ia64_stfe(dst, 6); \
} while(0)
struct user_regs_struct32 {
};
/* Prototypes for use in elfcore32.h */
-int save_ia32_fpstate (struct task_struct *tsk,
- struct ia32_user_i387_struct *save);
-
-int save_ia32_fpxstate (struct task_struct *tsk,
- struct ia32_user_fxsr_struct *save);
+extern int save_ia32_fpstate (struct task_struct *tsk, struct ia32_user_i387_struct *save);
+extern int save_ia32_fpxstate (struct task_struct *tsk, struct ia32_user_fxsr_struct *save);
#endif /* !CONFIG_IA32_SUPPORT */
#include <linux/compat.h>
#include <linux/vfs.h>
+#include <asm/intrinsics.h>
+#include <asm/semaphore.h>
#include <asm/types.h>
#include <asm/uaccess.h>
-#include <asm/semaphore.h>
-#include <asm/intrinsics.h>
#include "ia32priv.h"
+++ /dev/null
-/*
- * PAL & SAL emulation.
- *
- * Copyright (C) 1998-2001 Hewlett-Packard Co
- * David Mosberger-Tang <davidm@hpl.hp.com>
- *
- * For the HP simulator, this file gets include in boot/bootloader.c.
- * For SoftSDV, this file gets included in sys_softsdv.c.
- */
-#include <linux/config.h>
-
-#ifdef CONFIG_PCI
-# include <linux/pci.h>
-#endif
-
-#include <linux/efi.h>
-#include <asm/io.h>
-#include <asm/pal.h>
-#include <asm/sal.h>
-
-#define MB (1024*1024UL)
-
-#define SIMPLE_MEMMAP 1
-
-#if SIMPLE_MEMMAP
-# define NUM_MEM_DESCS 4
-#else
-# define NUM_MEM_DESCS 16
-#endif
-
-static char fw_mem[( sizeof(struct ia64_boot_param)
- + sizeof(efi_system_table_t)
- + sizeof(efi_runtime_services_t)
- + 1*sizeof(efi_config_table_t)
- + sizeof(struct ia64_sal_systab)
- + sizeof(struct ia64_sal_desc_entry_point)
- + NUM_MEM_DESCS*(sizeof(efi_memory_desc_t))
- + 1024)] __attribute__ ((aligned (8)));
-
-#if defined(CONFIG_IA64_HP_SIM) || defined(CONFIG_IA64_GENERIC)
-
-/* Simulator system calls: */
-
-#define SSC_EXIT 66
-
-/*
- * Simulator system call.
- */
-extern long ssc (long arg0, long arg1, long arg2, long arg3, int nr);
-
-#define SECS_PER_HOUR (60 * 60)
-#define SECS_PER_DAY (SECS_PER_HOUR * 24)
-
-/* Compute the `struct tm' representation of *T,
- offset OFFSET seconds east of UTC,
- and store year, yday, mon, mday, wday, hour, min, sec into *TP.
- Return nonzero if successful. */
-int
-offtime (unsigned long t, efi_time_t *tp)
-{
- const unsigned short int __mon_yday[2][13] =
- {
- /* Normal years. */
- { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
- /* Leap years. */
- { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
- };
- long int days, rem, y;
- const unsigned short int *ip;
-
- days = t / SECS_PER_DAY;
- rem = t % SECS_PER_DAY;
- while (rem < 0) {
- rem += SECS_PER_DAY;
- --days;
- }
- while (rem >= SECS_PER_DAY) {
- rem -= SECS_PER_DAY;
- ++days;
- }
- tp->hour = rem / SECS_PER_HOUR;
- rem %= SECS_PER_HOUR;
- tp->minute = rem / 60;
- tp->second = rem % 60;
- /* January 1, 1970 was a Thursday. */
- y = 1970;
-
-# define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
-# define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
-# define __isleap(year) \
- ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
-
- while (days < 0 || days >= (__isleap (y) ? 366 : 365)) {
- /* Guess a corrected year, assuming 365 days per year. */
- long int yg = y + days / 365 - (days % 365 < 0);
-
- /* Adjust DAYS and Y to match the guessed year. */
- days -= ((yg - y) * 365 + LEAPS_THRU_END_OF (yg - 1)
- - LEAPS_THRU_END_OF (y - 1));
- y = yg;
- }
- tp->year = y;
- ip = __mon_yday[__isleap(y)];
- for (y = 11; days < (long int) ip[y]; --y)
- continue;
- days -= ip[y];
- tp->month = y + 1;
- tp->day = days + 1;
- return 1;
-}
-
-#endif /* CONFIG_IA64_HP_SIM */
-
-/*
- * Very ugly, but we need this in the simulator only. Once we run on
- * real hw, this can all go away.
- */
-extern void pal_emulator_static (void);
-
-/* Macro to emulate SAL call using legacy IN and OUT calls to CF8, CFC etc.. */
-
-#define BUILD_CMD(addr) ((0x80000000 | (addr)) & ~3)
-
-#define REG_OFFSET(addr) (0x00000000000000FF & (addr))
-#define DEVICE_FUNCTION(addr) (0x000000000000FF00 & (addr))
-#define BUS_NUMBER(addr) (0x0000000000FF0000 & (addr))
-
-static efi_status_t
-efi_get_time (efi_time_t *tm, efi_time_cap_t *tc)
-{
-#if defined(CONFIG_IA64_HP_SIM) || defined(CONFIG_IA64_GENERIC)
- struct {
- int tv_sec; /* must be 32bits to work */
- int tv_usec;
- } tv32bits;
-
- ssc((unsigned long) &tv32bits, 0, 0, 0, SSC_GET_TOD);
-
- memset(tm, 0, sizeof(*tm));
- offtime(tv32bits.tv_sec, tm);
-
- if (tc)
- memset(tc, 0, sizeof(*tc));
-#else
-# error Not implemented yet...
-#endif
- return EFI_SUCCESS;
-}
-
-static void
-efi_reset_system (int reset_type, efi_status_t status, unsigned long data_size, efi_char16_t *data)
-{
-#if defined(CONFIG_IA64_HP_SIM) || defined(CONFIG_IA64_GENERIC)
- ssc(status, 0, 0, 0, SSC_EXIT);
-#else
-# error Not implemented yet...
-#endif
-}
-
-static efi_status_t
-efi_unimplemented (void)
-{
- return EFI_UNSUPPORTED;
-}
-
-static struct sal_ret_values
-sal_emulator (long index, unsigned long in1, unsigned long in2,
- unsigned long in3, unsigned long in4, unsigned long in5,
- unsigned long in6, unsigned long in7)
-{
- long r9 = 0;
- long r10 = 0;
- long r11 = 0;
- long status;
-
- /*
- * Don't do a "switch" here since that gives us code that
- * isn't self-relocatable.
- */
- status = 0;
- if (index == SAL_FREQ_BASE) {
- switch (in1) {
- case SAL_FREQ_BASE_PLATFORM:
- r9 = 200000000;
- break;
-
- case SAL_FREQ_BASE_INTERVAL_TIMER:
- /*
- * Is this supposed to be the cr.itc frequency
- * or something platform specific? The SAL
- * doc ain't exactly clear on this...
- */
- r9 = 700000000;
- break;
-
- case SAL_FREQ_BASE_REALTIME_CLOCK:
- r9 = 1;
- break;
-
- default:
- status = -1;
- break;
- }
- } else if (index == SAL_SET_VECTORS) {
- ;
- } else if (index == SAL_GET_STATE_INFO) {
- ;
- } else if (index == SAL_GET_STATE_INFO_SIZE) {
- ;
- } else if (index == SAL_CLEAR_STATE_INFO) {
- ;
- } else if (index == SAL_MC_RENDEZ) {
- ;
- } else if (index == SAL_MC_SET_PARAMS) {
- ;
- } else if (index == SAL_CACHE_FLUSH) {
- ;
- } else if (index == SAL_CACHE_INIT) {
- ;
-#ifdef CONFIG_PCI
- } else if (index == SAL_PCI_CONFIG_READ) {
- /*
- * in1 contains the PCI configuration address and in2
- * the size of the read. The value that is read is
- * returned via the general register r9.
- */
- outl(BUILD_CMD(in1), 0xCF8);
- if (in2 == 1) /* Reading byte */
- r9 = inb(0xCFC + ((REG_OFFSET(in1) & 3)));
- else if (in2 == 2) /* Reading word */
- r9 = inw(0xCFC + ((REG_OFFSET(in1) & 2)));
- else /* Reading dword */
- r9 = inl(0xCFC);
- status = PCIBIOS_SUCCESSFUL;
- } else if (index == SAL_PCI_CONFIG_WRITE) {
- /*
- * in1 contains the PCI configuration address, in2 the
- * size of the write, and in3 the actual value to be
- * written out.
- */
- outl(BUILD_CMD(in1), 0xCF8);
- if (in2 == 1) /* Writing byte */
- outb(in3, 0xCFC + ((REG_OFFSET(in1) & 3)));
- else if (in2 == 2) /* Writing word */
- outw(in3, 0xCFC + ((REG_OFFSET(in1) & 2)));
- else /* Writing dword */
- outl(in3, 0xCFC);
- status = PCIBIOS_SUCCESSFUL;
-#endif /* CONFIG_PCI */
- } else if (index == SAL_UPDATE_PAL) {
- ;
- } else {
- status = -1;
- }
- return ((struct sal_ret_values) {status, r9, r10, r11});
-}
-
-
-/*
- * This is here to work around a bug in egcs-1.1.1b that causes the
- * compiler to crash (seems like a bug in the new alias analysis code.
- */
-void *
-id (long addr)
-{
- return (void *) addr;
-}
-
-struct ia64_boot_param *
-sys_fw_init (const char *args, int arglen)
-{
- efi_system_table_t *efi_systab;
- efi_runtime_services_t *efi_runtime;
- efi_config_table_t *efi_tables;
- struct ia64_sal_systab *sal_systab;
- efi_memory_desc_t *efi_memmap, *md;
- unsigned long *pal_desc, *sal_desc;
- struct ia64_sal_desc_entry_point *sal_ed;
- struct ia64_boot_param *bp;
- unsigned char checksum = 0;
- char *cp, *cmd_line;
- int i = 0;
-# define MAKE_MD(typ, attr, start, end) \
- do { \
- md = efi_memmap + i++; \
- md->type = typ; \
- md->pad = 0; \
- md->phys_addr = start; \
- md->virt_addr = 0; \
- md->num_pages = (end - start) >> 12; \
- md->attribute = attr; \
- } while (0)
-
- memset(fw_mem, 0, sizeof(fw_mem));
-
- pal_desc = (unsigned long *) &pal_emulator_static;
- sal_desc = (unsigned long *) &sal_emulator;
-
- cp = fw_mem;
- efi_systab = (void *) cp; cp += sizeof(*efi_systab);
- efi_runtime = (void *) cp; cp += sizeof(*efi_runtime);
- efi_tables = (void *) cp; cp += sizeof(*efi_tables);
- sal_systab = (void *) cp; cp += sizeof(*sal_systab);
- sal_ed = (void *) cp; cp += sizeof(*sal_ed);
- efi_memmap = (void *) cp; cp += NUM_MEM_DESCS*sizeof(*efi_memmap);
- bp = (void *) cp; cp += sizeof(*bp);
- cmd_line = (void *) cp;
-
- if (args) {
- if (arglen >= 1024)
- arglen = 1023;
- memcpy(cmd_line, args, arglen);
- } else {
- arglen = 0;
- }
- cmd_line[arglen] = '\0';
-
- memset(efi_systab, 0, sizeof(efi_systab));
- efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
- efi_systab->hdr.revision = EFI_SYSTEM_TABLE_REVISION;
- efi_systab->hdr.headersize = sizeof(efi_systab->hdr);
- efi_systab->fw_vendor = __pa("H\0e\0w\0l\0e\0t\0t\0-\0P\0a\0c\0k\0a\0r\0d\0\0");
- efi_systab->fw_revision = 1;
- efi_systab->runtime = __pa(efi_runtime);
- efi_systab->nr_tables = 1;
- efi_systab->tables = __pa(efi_tables);
-
- efi_runtime->hdr.signature = EFI_RUNTIME_SERVICES_SIGNATURE;
- efi_runtime->hdr.revision = EFI_RUNTIME_SERVICES_REVISION;
- efi_runtime->hdr.headersize = sizeof(efi_runtime->hdr);
- efi_runtime->get_time = __pa(&efi_get_time);
- efi_runtime->set_time = __pa(&efi_unimplemented);
- efi_runtime->get_wakeup_time = __pa(&efi_unimplemented);
- efi_runtime->set_wakeup_time = __pa(&efi_unimplemented);
- efi_runtime->set_virtual_address_map = __pa(&efi_unimplemented);
- efi_runtime->get_variable = __pa(&efi_unimplemented);
- efi_runtime->get_next_variable = __pa(&efi_unimplemented);
- efi_runtime->set_variable = __pa(&efi_unimplemented);
- efi_runtime->get_next_high_mono_count = __pa(&efi_unimplemented);
- efi_runtime->reset_system = __pa(&efi_reset_system);
-
- efi_tables->guid = SAL_SYSTEM_TABLE_GUID;
- efi_tables->table = __pa(sal_systab);
-
- /* fill in the SAL system table: */
- memcpy(sal_systab->signature, "SST_", 4);
- sal_systab->size = sizeof(*sal_systab);
- sal_systab->sal_rev_minor = 1;
- sal_systab->sal_rev_major = 0;
- sal_systab->entry_count = 1;
-
-#ifdef CONFIG_IA64_GENERIC
- strcpy(sal_systab->oem_id, "Generic");
- strcpy(sal_systab->product_id, "IA-64 system");
-#endif
-
-#ifdef CONFIG_IA64_HP_SIM
- strcpy(sal_systab->oem_id, "Hewlett-Packard");
- strcpy(sal_systab->product_id, "HP-simulator");
-#endif
-
-#ifdef CONFIG_IA64_SDV
- strcpy(sal_systab->oem_id, "Intel");
- strcpy(sal_systab->product_id, "SDV");
-#endif
-
- /* fill in an entry point: */
- sal_ed->type = SAL_DESC_ENTRY_POINT;
- sal_ed->pal_proc = __pa(pal_desc[0]);
- sal_ed->sal_proc = __pa(sal_desc[0]);
- sal_ed->gp = __pa(sal_desc[1]);
-
- for (cp = (char *) sal_systab; cp < (char *) efi_memmap; ++cp)
- checksum += *cp;
-
- sal_systab->checksum = -checksum;
-
-#if SIMPLE_MEMMAP
- /* simulate free memory at physical address zero */
- MAKE_MD(EFI_BOOT_SERVICES_DATA, EFI_MEMORY_WB, 0*MB, 1*MB);
- MAKE_MD(EFI_PAL_CODE, EFI_MEMORY_WB, 1*MB, 2*MB);
- MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 2*MB, 130*MB);
- MAKE_MD(EFI_CONVENTIONAL_MEMORY, EFI_MEMORY_WB, 4096*MB, 4128*MB);
-#else
- MAKE_MD( 4, 0x9, 0x0000000000000000, 0x0000000000001000);
- MAKE_MD( 7, 0x9, 0x0000000000001000, 0x000000000008a000);
- MAKE_MD( 4, 0x9, 0x000000000008a000, 0x00000000000a0000);
- MAKE_MD( 5, 0x8000000000000009, 0x00000000000c0000, 0x0000000000100000);
- MAKE_MD( 7, 0x9, 0x0000000000100000, 0x0000000004400000);
- MAKE_MD( 2, 0x9, 0x0000000004400000, 0x0000000004be5000);
- MAKE_MD( 7, 0x9, 0x0000000004be5000, 0x000000007f77e000);
- MAKE_MD( 6, 0x8000000000000009, 0x000000007f77e000, 0x000000007fb94000);
- MAKE_MD( 6, 0x8000000000000009, 0x000000007fb94000, 0x000000007fb95000);
- MAKE_MD( 6, 0x8000000000000009, 0x000000007fb95000, 0x000000007fc00000);
- MAKE_MD(13, 0x8000000000000009, 0x000000007fc00000, 0x000000007fc3a000);
- MAKE_MD( 7, 0x9, 0x000000007fc3a000, 0x000000007fea0000);
- MAKE_MD( 5, 0x8000000000000009, 0x000000007fea0000, 0x000000007fea8000);
- MAKE_MD( 7, 0x9, 0x000000007fea8000, 0x000000007feab000);
- MAKE_MD( 5, 0x8000000000000009, 0x000000007feab000, 0x000000007ffff000);
- MAKE_MD( 7, 0x9, 0x00000000ff400000, 0x0000000104000000);
-#endif
-
- bp->efi_systab = __pa(&fw_mem);
- bp->efi_memmap = __pa(efi_memmap);
- bp->efi_memmap_size = NUM_MEM_DESCS*sizeof(efi_memory_desc_t);
- bp->efi_memdesc_size = sizeof(efi_memory_desc_t);
- bp->efi_memdesc_version = 1;
- bp->command_line = __pa(cmd_line);
- bp->console_info.num_cols = 80;
- bp->console_info.num_rows = 25;
- bp->console_info.orig_x = 0;
- bp->console_info.orig_y = 24;
- bp->fpswa = 0;
-
- return bp;
-}
#include <asm/bitops.h>
#include <asm/delay.h>
+#include <asm/intrinsics.h>
#include <asm/io.h>
#include <asm/hw_irq.h>
#include <asm/machvec.h>
#include <asm/pgtable.h>
#include <asm/system.h>
-#include <asm/intrinsics.h>
#ifdef CONFIG_PERFMON
# include <asm/perfmon.h>
ia64_mca_cmc_vector_disable (void *dummy)
{
cmcv_reg_t cmcv;
-
+
cmcv = (cmcv_reg_t)ia64_getreg(_IA64_REG_CR_CMCV);
cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
ia64_mca_cmc_vector_enable (void *dummy)
{
cmcv_reg_t cmcv;
-
+
cmcv = (cmcv_reg_t)ia64_getreg(_IA64_REG_CR_CMCV);
cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
ia64_mca_cmc_int_handler(cpe_irq, arg, ptregs);
for (++cpuid ; !cpu_online(cpuid) && cpuid < NR_CPUS ; cpuid++);
-
+
if (cpuid < NR_CPUS) {
platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
} else {
start_count = -1;
}
-
+
return IRQ_HANDLED;
}
#include <asm/bitops.h>
#include <asm/errno.h>
+#include <asm/intrinsics.h>
#include <asm/page.h>
#include <asm/perfmon.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/delay.h>
-#include <asm/intrinsics.h>
#ifdef CONFIG_PERFMON
/*
static inline void
pfm_clear_psr_pp(void)
{
- ia64_rsm(IA64_PSR_PP)
+ ia64_rsm(IA64_PSR_PP);
ia64_srlz_i();
}
static inline void
pfm_set_psr_pp(void)
{
- ia64_ssm(IA64_PSR_PP)
+ ia64_ssm(IA64_PSR_PP);
ia64_srlz_i();
}
static inline void
pfm_clear_psr_up(void)
{
- ia64_rsm(IA64_PSR_UP)
+ ia64_rsm(IA64_PSR_UP);
ia64_srlz_i();
}
static inline void
pfm_set_psr_up(void)
{
- ia64_ssm(IA64_PSR_UP)
+ ia64_ssm(IA64_PSR_UP);
ia64_srlz_i();
}
*/
if (ctx->ctx_fl_system && (PFM_CPUINFO_GET() & PFM_CPUINFO_DCR_PP)) {
/* disable dcr pp */
- ia64_setreg(_IA64_REG_CR_DCR,
- ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
+ ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
pfm_clear_psr_pp();
} else {
pfm_clear_psr_up();
*/
if (ctx->ctx_fl_system && (PFM_CPUINFO_GET() & PFM_CPUINFO_DCR_PP)) {
/* enable dcr pp */
- ia64_setreg(_IA64_REG_CR_DCR,
- ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP);
+ ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP);
ia64_srlz_i();
}
pfm_set_psr_l(psr);
/*
* Update local PMU
*/
- ia64_setreg(_IA64_REG_CR_DCR,
- ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
+ ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
ia64_srlz_i();
/*
* update local cpuinfo
*
* disable dcr pp
*/
- ia64_setreg(_IA64_REG_CR_DCR,
- ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
+ ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) & ~IA64_DCR_PP);
ia64_srlz_i();
/*
pfm_set_psr_pp();
/* enable dcr pp */
- ia64_setreg(_IA64_REG_CR_DCR,
- ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP);
+ ia64_setreg(_IA64_REG_CR_DCR, ia64_getreg(_IA64_REG_CR_DCR) | IA64_DCR_PP);
ia64_srlz_i();
return 0;
* shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
* be fine).
*/
- ia64_setreg(_IA64_REG_CR_DCR, IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX
- | IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC);
+ ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
+ | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
atomic_inc(&init_mm.mm_count);
current->active_mm = &init_mm;
if (current->mm)
/*
* Architecture-specific signal handling support.
*
- * Copyright (C) 1999-2002 Hewlett-Packard Co
+ * Copyright (C) 1999-2003 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*
* Derived from i386 and Alpha versions.
#include <linux/wait.h>
#include <asm/ia32.h>
+#include <asm/intrinsics.h>
#include <asm/uaccess.h>
#include <asm/rse.h>
#include <asm/sigcontext.h>
# define GET_SIGSET(k,u) __get_user((k)->sig[0], &(u)->sig[0])
#endif
-#include <asm/intrinsics.h>
#ifdef ASM_SUPPORTED
+/*
+ * Don't let GCC uses f16-f31 so that when we setup/restore the registers in the signal
+ * context in __kernel_sigtramp(), we can be sure that registers f16-f31 contain user-level
+ * values.
+ */
register double f16 asm ("f16"); register double f17 asm ("f17");
register double f18 asm ("f18"); register double f19 asm ("f19");
register double f20 asm ("f20"); register double f21 asm ("f21");
case __SI_TIMER >> 16:
err |= __put_user(from->si_tid, &to->si_tid);
err |= __put_user(from->si_overrun, &to->si_overrun);
- err |= __put_user(from->si_value.sival_ptr, &to->si_value.sival_ptr);
+ err |= __put_user(from->si_ptr, &to->si_ptr);
break;
case __SI_CHLD >> 16:
err |= __put_user(from->si_utime, &to->si_utime);
#include <linux/tty.h>
#include <linux/vt_kern.h> /* For unblank_screen() */
+#include <asm/fpswa.h>
#include <asm/hardirq.h>
#include <asm/ia32.h>
+#include <asm/intrinsics.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
-#include <asm/fpswa.h>
/*
* fp_emulate() needs to be able to access and update all floating point registers. Those
* saved in pt_regs can be accessed through that structure, but those not saved, will be
* by declaring preserved registers that are not marked as "fixed" as global register
* variables.
*/
-#include <asm/intrinsics.h>
#ifdef ASM_SUPPORTED
register double f2 asm ("f2"); register double f3 asm ("f3");
register double f4 asm ("f4"); register double f5 asm ("f5");
#include <linux/smp_lock.h>
#include <linux/tty.h>
-#include <asm/uaccess.h>
-#include <asm/rse.h>
+#include <asm/intrinsics.h>
#include <asm/processor.h>
+#include <asm/rse.h>
+#include <asm/uaccess.h>
#include <asm/unaligned.h>
-#include <asm/intrinsics.h>
extern void die_if_kernel(char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
{
unsigned long result;
- result = ia64_popcnt((x & (~x - 1)));
+ result = ia64_popcnt(x & (~x - 1));
return result;
}
*/
#include <asm/intrinsics.h>
-/* In kernel mode, thread pointer (r13) is used to point to the
- current task structure. */
-#define current ((struct task_struct *) ia64_getreg(_IA64_REG_TP))
+
+/*
+ * In kernel mode, thread pointer (r13) is used to point to the current task
+ * structure.
+ */
+#define current ((struct task_struct *) ia64_getreg(_IA64_REG_TP))
#endif /* _ASM_IA64_CURRENT_H */
* Delay routines using a pre-computed "cycles/usec" value.
*
* Copyright (C) 1998, 1999 Hewlett-Packard Co
- * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
+ * David Mosberger-Tang <davidm@hpl.hp.com>
* Copyright (C) 1999 VA Linux Systems
* Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
* Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
#include <linux/sched.h>
#include <linux/compiler.h>
-#include <asm/processor.h>
#include <asm/intrinsics.h>
+#include <asm/processor.h>
static __inline__ void
ia64_set_itm (unsigned long val)
if (loops < 1)
return;
- for (;loops--;)
+ while (loops--)
ia64_nop(0);
}
/* Optimization barrier */
/* The "volatile" is due to gcc bugs */
-#define ia64_barrier() __asm__ __volatile__ ("":::"memory")
-
-
-#define ia64_stop() __asm__ __volatile__ (";;"::)
-
-
-#define ia64_invala_gr(regnum) \
- __asm__ __volatile__ ("invala.e r%0" :: "i"(regnum))
-
-#define ia64_invala_fr(regnum) \
- __asm__ __volatile__ ("invala.e f%0" :: "i"(regnum))
-
-extern void ia64_bad_param_for_setreg(void);
-extern void ia64_bad_param_for_getreg(void);
-
-#define ia64_setreg(regnum, val) \
-({ \
- switch (regnum) { \
- case _IA64_REG_PSR_L: \
- __asm__ __volatile__ ("mov psr.l=%0" :: "r"(val) : "memory"); \
- break; \
- case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
- __asm__ __volatile__ ("mov ar%0=%1" :: \
- "i" (regnum - _IA64_REG_AR_KR0), \
- "r"(val): "memory"); \
- break; \
- case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
- __asm__ __volatile__ ("mov cr%0=%1" :: \
- "i" (regnum - _IA64_REG_CR_DCR), \
- "r"(val): "memory" ); \
- break; \
- case _IA64_REG_SP: \
- __asm__ __volatile__ ("mov r12=%0" :: \
- "r"(val): "memory"); \
- break; \
- case _IA64_REG_GP: \
- __asm__ __volatile__ ("mov gp=%0" :: "r"(val) : "memory"); \
- break; \
- default: \
- ia64_bad_param_for_setreg(); \
- break; \
- } \
-})
-
-#define ia64_getreg(regnum) \
-({ \
- __u64 ia64_intri_res; \
- \
- switch (regnum) { \
- case _IA64_REG_GP: \
- __asm__ __volatile__ ("mov %0=gp" : "=r"(ia64_intri_res)); \
- break; \
- case _IA64_REG_IP: \
- __asm__ __volatile__ ("mov %0=ip" : "=r"(ia64_intri_res)); \
- break; \
- case _IA64_REG_PSR: \
- __asm__ __volatile__ ("mov %0=psr" : "=r"(ia64_intri_res));\
- break; \
- case _IA64_REG_TP: /* for current() */ \
- { \
- register __u64 ia64_r13 asm ("r13"); \
- ia64_intri_res = ia64_r13; \
- } \
- break; \
- case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
- __asm__ __volatile__ ("mov %0=ar%1" : "=r" (ia64_intri_res) \
- : "i"(regnum - _IA64_REG_AR_KR0)); \
- break; \
- case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
- __asm__ __volatile__ ("mov %0=cr%1" : "=r" (ia64_intri_res) \
- : "i" (regnum - _IA64_REG_CR_DCR)); \
- break; \
- case _IA64_REG_SP: \
- __asm__ __volatile__ ("mov %0=sp" : "=r" (ia64_intri_res)); \
- break; \
- default: \
- ia64_bad_param_for_getreg(); \
- break; \
- } \
- ia64_intri_res; \
+#define ia64_barrier() asm volatile ("":::"memory")
+
+#define ia64_stop() asm volatile (";;"::)
+
+#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
+
+#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
+
+extern void ia64_bad_param_for_setreg (void);
+extern void ia64_bad_param_for_getreg (void);
+
+#define ia64_setreg(regnum, val) \
+({ \
+ switch (regnum) { \
+ case _IA64_REG_PSR_L: \
+ asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
+ break; \
+ case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
+ asm volatile ("mov ar%0=%1" :: \
+ "i" (regnum - _IA64_REG_AR_KR0), \
+ "r"(val): "memory"); \
+ break; \
+ case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
+ asm volatile ("mov cr%0=%1" :: \
+ "i" (regnum - _IA64_REG_CR_DCR), \
+ "r"(val): "memory" ); \
+ break; \
+ case _IA64_REG_SP: \
+ asm volatile ("mov r12=%0" :: \
+ "r"(val): "memory"); \
+ break; \
+ case _IA64_REG_GP: \
+ asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
+ break; \
+ default: \
+ ia64_bad_param_for_setreg(); \
+ break; \
+ } \
+})
+
+#define ia64_getreg(regnum) \
+({ \
+ __u64 ia64_intri_res; \
+ \
+ switch (regnum) { \
+ case _IA64_REG_GP: \
+ asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
+ break; \
+ case _IA64_REG_IP: \
+ asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
+ break; \
+ case _IA64_REG_PSR: \
+ asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
+ break; \
+ case _IA64_REG_TP: /* for current() */ \
+ { \
+ register __u64 ia64_r13 asm ("r13"); \
+ ia64_intri_res = ia64_r13; \
+ } \
+ break; \
+ case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
+ asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
+ : "i"(regnum - _IA64_REG_AR_KR0)); \
+ break; \
+ case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
+ asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
+ : "i" (regnum - _IA64_REG_CR_DCR)); \
+ break; \
+ case _IA64_REG_SP: \
+ asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
+ break; \
+ default: \
+ ia64_bad_param_for_getreg(); \
+ break; \
+ } \
+ ia64_intri_res; \
})
#define ia64_hint_pause 0
+
#define ia64_hint(mode) \
({ \
switch (mode) { \
#define ia64_mux1_alt 10
#define ia64_mux1_rev 11
-#define ia64_mux1(x, mode) \
-({ \
- __u64 ia64_intri_res; \
- \
- switch (mode) { \
- case ia64_mux1_brcst: \
- __asm__ ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
- break; \
- case ia64_mux1_mix: \
- __asm__ ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
- break; \
- case ia64_mux1_shuf: \
- __asm__ ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
- break; \
- case ia64_mux1_alt: \
- __asm__ ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
- break; \
- case ia64_mux1_rev: \
- __asm__ ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
- break; \
- } \
- ia64_intri_res; \
+#define ia64_mux1(x, mode) \
+({ \
+ __u64 ia64_intri_res; \
+ \
+ switch (mode) { \
+ case ia64_mux1_brcst: \
+ asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
+ break; \
+ case ia64_mux1_mix: \
+ asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
+ break; \
+ case ia64_mux1_shuf: \
+ asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
+ break; \
+ case ia64_mux1_alt: \
+ asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
+ break; \
+ case ia64_mux1_rev: \
+ asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
+ break; \
+ } \
+ ia64_intri_res; \
})
-
#define ia64_popcnt(x) \
({ \
__u64 ia64_intri_res; \
- __asm__ ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
+ asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
\
ia64_intri_res; \
})
-
#define ia64_getf_exp(x) \
({ \
long ia64_intri_res; \
\
- __asm__ ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
+ asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
\
ia64_intri_res; \
})
-#define ia64_shrp(a, b, count) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
- ia64_intri_res; \
+#define ia64_shrp(a, b, count) \
+({ \
+ __u64 ia64_intri_res; \
+ asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
+ ia64_intri_res; \
})
-
#define ia64_ldfs(regnum, x) \
({ \
register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
+ asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
})
#define ia64_ldfd(regnum, x) \
({ \
register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
+ asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
})
#define ia64_ldfe(regnum, x) \
({ \
register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
+ asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
})
#define ia64_ldf8(regnum, x) \
({ \
register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
+ asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
})
#define ia64_ldf_fill(regnum, x) \
({ \
register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
-})
-
-#define ia64_stfs(x, regnum) \
-({ \
- register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
-})
-
-
-#define ia64_stfd(x, regnum) \
-({ \
- register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+ asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
})
-#define ia64_stfe(x, regnum) \
-({ \
- register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+#define ia64_stfs(x, regnum) \
+({ \
+ register double __f__ asm ("f"#regnum); \
+ asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})
-
-#define ia64_stf8(x, regnum) \
-({ \
- register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+#define ia64_stfd(x, regnum) \
+({ \
+ register double __f__ asm ("f"#regnum); \
+ asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})
-#define ia64_stf_spill(x, regnum) \
-({ \
- register double __f__ asm ("f"#regnum); \
- __asm__ __volatile__ ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+#define ia64_stfe(x, regnum) \
+({ \
+ register double __f__ asm ("f"#regnum); \
+ asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})
-#define ia64_fetchadd4_acq(p, inc) \
+#define ia64_stf8(x, regnum) \
+({ \
+ register double __f__ asm ("f"#regnum); \
+ asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_stf_spill(x, regnum) \
+({ \
+ register double __f__ asm ("f"#regnum); \
+ asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
+})
+
+#define ia64_fetchadd4_acq(p, inc) \
+({ \
+ \
+ __u64 ia64_intri_res; \
+ asm volatile ("fetchadd4.acq %0=[%1],%2" \
+ : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
+ : "memory"); \
+ \
+ ia64_intri_res; \
+})
+
+#define ia64_fetchadd4_rel(p, inc) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("fetchadd4.rel %0=[%1],%2" \
+ : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
+ : "memory"); \
+ \
+ ia64_intri_res; \
+})
+
+#define ia64_fetchadd8_acq(p, inc) \
+({ \
+ \
+ __u64 ia64_intri_res; \
+ asm volatile ("fetchadd8.acq %0=[%1],%2" \
+ : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
+ : "memory"); \
+ \
+ ia64_intri_res; \
+})
+
+#define ia64_fetchadd8_rel(p, inc) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("fetchadd8.rel %0=[%1],%2" \
+ : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
+ : "memory"); \
+ \
+ ia64_intri_res; \
+})
+
+#define ia64_xchg1(ptr,x) \
({ \
- \
__u64 ia64_intri_res; \
- __asm__ __volatile__ ("fetchadd4.acq %0=[%1],%2" \
- : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
- : "memory"); \
- \
+ asm __volatile ("xchg1 %0=[%1],%2" : "=r" (ia64_intri_res) \
+ : "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})
-#define ia64_fetchadd4_rel(p, inc) \
+#define ia64_xchg2(ptr,x) \
({ \
__u64 ia64_intri_res; \
- __asm__ __volatile__ ("fetchadd4.rel %0=[%1],%2" \
- : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
- : "memory"); \
- \
+ asm __volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
+ : "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})
-
-#define ia64_fetchadd8_acq(p, inc) \
+#define ia64_xchg4(ptr,x) \
({ \
- \
__u64 ia64_intri_res; \
- __asm__ __volatile__ ("fetchadd8.acq %0=[%1],%2" \
- : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
- : "memory"); \
- \
+ asm __volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
+ : "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})
-#define ia64_fetchadd8_rel(p, inc) \
+#define ia64_xchg8(ptr,x) \
({ \
__u64 ia64_intri_res; \
- __asm__ __volatile__ ("fetchadd8.rel %0=[%1],%2" \
- : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
- : "memory"); \
- \
+ asm __volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
+ : "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})
-
-#define ia64_xchg1(ptr,x) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile ("xchg1 %0=[%1],%2" : "=r" (ia64_intri_res) \
- : "r" (ptr), "r" (x) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg1_acq(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_xchg2(ptr,x) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
- : "r" (ptr), "r" (x) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg1_rel(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_xchg4(ptr,x) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
- : "r" (ptr), "r" (x) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg2_acq(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_xchg8(ptr,x) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
- : "r" (ptr), "r" (x) : "memory"); \
- ia64_intri_res; \
-})
-
-#define ia64_cmpxchg1_acq(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
-})
-
-#define ia64_cmpxchg1_rel(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg2_rel(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ \
+ asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_cmpxchg2_acq(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg4_acq(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_cmpxchg2_rel(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- \
- __asm__ __volatile__ ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg4_rel(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_cmpxchg4_acq(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg8_acq(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_cmpxchg4_rel(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
+#define ia64_cmpxchg8_rel(ptr, new, old) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
+ \
+ asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
+ "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
+ ia64_intri_res; \
})
-#define ia64_cmpxchg8_acq(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- __asm__ __volatile__ ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
-})
-
-#define ia64_cmpxchg8_rel(ptr, new, old) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(old)); \
- \
- __asm__ __volatile__ ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
- "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
- ia64_intri_res; \
-})
+#define ia64_mf() asm volatile ("mf" ::: "memory")
+#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
-#define ia64_mf() __asm__ __volatile__ ("mf" ::: "memory")
-#define ia64_mfa() __asm__ __volatile__ ("mf.a" ::: "memory")
+#define ia64_invala() asm volatile ("invala" ::: "memory")
-
-#define ia64_invala() __asm__ __volatile__ ("invala" ::: "memory")
-
-#define ia64_thash(addr) \
-({ \
- __u64 ia64_intri_res; \
- __asm__ __volatile__ ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
- ia64_intri_res; \
+#define ia64_thash(addr) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
+ ia64_intri_res; \
})
+#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
-#define ia64_srlz_i() __asm__ __volatile__ (";; srlz.i ;;" ::: "memory")
-
+#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
-#define ia64_srlz_d() __asm__ __volatile__ (";; srlz.d" ::: "memory");
+#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
+#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
-#define ia64_nop(x) __asm__ __volatile__ ("nop %0"::"i"(x));
+#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
-#define ia64_itci(addr) __asm__ __volatile__ ("itc.i %0;;" :: "r"(addr) : "memory")
+#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
+ :: "r"(trnum), "r"(addr) : "memory")
-#define ia64_itcd(addr) __asm__ __volatile__ ("itc.d %0;;" :: "r"(addr) : "memory")
+#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
+ :: "r"(trnum), "r"(addr) : "memory")
-
-#define ia64_itri(trnum, addr) __asm__ __volatile__ ("itr.i itr[%0]=%1" \
- :: "r"(trnum), "r"(addr) : "memory")
-
-
-#define ia64_itrd(trnum, addr) __asm__ __volatile__ ("itr.d dtr[%0]=%1" \
- :: "r"(trnum), "r"(addr) : "memory")
-
-
-#define ia64_tpa(addr) \
-({ \
- __u64 ia64_pa; \
- __asm__ __volatile__ ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : \
- "memory"); \
+#define ia64_tpa(addr) \
+({ \
+ __u64 ia64_pa; \
+ asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
ia64_pa; \
})
-#define __ia64_set_dbr(index, val) \
- __asm__ __volatile__ ("mov dbr[%0]=%1" :: "r"(index), "r"(val) \
- : "memory")
+#define __ia64_set_dbr(index, val) \
+ asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-#define ia64_set_ibr(index, val) \
- __asm__ __volatile__ ("mov ibr[%0]=%1" :: "r"(index), "r"(val) \
- : "memory")
+#define ia64_set_ibr(index, val) \
+ asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-#define ia64_set_pkr(index, val) \
- __asm__ __volatile__ ("mov pkr[%0]=%1" :: "r"(index), "r"(val) \
- : "memory")
+#define ia64_set_pkr(index, val) \
+ asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-#define ia64_set_pmc(index, val) \
- __asm__ __volatile__ ("mov pmc[%0]=%1" :: "r"(index), "r"(val) \
- : "memory");
+#define ia64_set_pmc(index, val) \
+ asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
-#define ia64_set_pmd(index, val) \
- __asm__ __volatile__ ("mov pmd[%0]=%1" :: "r"(index), "r"(val) \
- : "memory");
+#define ia64_set_pmd(index, val) \
+ asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
-#define ia64_set_rr(index, val) \
- __asm__ __volatile__ ("mov rr[%0]=%1" :: "r"(index), "r"(val) \
- : "memory");
+#define ia64_set_rr(index, val) \
+ asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
-
-#define ia64_get_cpuid(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
- \
- ia64_intri_res; \
+#define ia64_get_cpuid(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
+ ia64_intri_res; \
})
-#define __ia64_get_dbr(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
- \
- ia64_intri_res; \
+#define __ia64_get_dbr(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
+ ia64_intri_res; \
})
-#define ia64_get_ibr(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
- \
- ia64_intri_res; \
+#define ia64_get_ibr(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
+ ia64_intri_res; \
})
-#define ia64_get_pkr(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
- \
- ia64_intri_res; \
+#define ia64_get_pkr(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
+ ia64_intri_res; \
})
-#define ia64_get_pmc(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
- \
- ia64_intri_res; \
+#define ia64_get_pmc(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
+ ia64_intri_res; \
})
-#define ia64_get_pmd(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
- \
- ia64_intri_res; \
+#define ia64_get_pmd(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
+ ia64_intri_res; \
})
-#define ia64_get_rr(index) \
-({ \
- __u64 ia64_intri_res; \
- \
- __asm__ __volatile__ ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" \
- (index)); \
- \
- ia64_intri_res; \
+#define ia64_get_rr(index) \
+({ \
+ __u64 ia64_intri_res; \
+ asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
+ ia64_intri_res; \
})
-
-#define ia64_fc(addr) \
- __asm__ __volatile__ ("fc %0" :: "r"(addr) : "memory");
-
-
-#define ia64_sync_i() \
- __asm__ __volatile__ (";; sync.i" ::: "memory")
-
-#define ia64_ssm(mask) __asm__ __volatile__ ("ssm %0":: "i"((mask)) : "memory");
-#define ia64_rsm(mask) __asm__ __volatile__ ("rsm %0":: "i"((mask)) : "memory");
-#define ia64_sum(mask) __asm__ __volatile__ ("sum %0":: "i"((mask)) : "memory");
-#define ia64_rum(mask) __asm__ __volatile__ ("rum %0":: "i"((mask)) : "memory");
-
-#define ia64_ptce(addr) \
- __asm__ __volatile__ ("ptc.e %0" :: "r"(addr))
+#define ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
-#define ia64_ptcga(addr, size) \
- __asm__ __volatile__ ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory")
+#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
+#define ia64_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
+#define ia64_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
+#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
+#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
-#define ia64_ptcl(addr, size) \
- __asm__ __volatile__ ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory")
+#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
+#define ia64_ptcga(addr, size) \
+ asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory")
-#define ia64_ptri(addr, size) \
- __asm__ __volatile__ ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
+#define ia64_ptcl(addr, size) \
+ asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory")
+#define ia64_ptri(addr, size) \
+ asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
-#define ia64_ptrd(addr, size) \
- __asm__ __volatile__ ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
+#define ia64_ptrd(addr, size) \
+ asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
#define ia64_lfhint_nt2 2
#define ia64_lfhint_nta 3
-#define ia64_lfetch(lfhint, y) \
-({ \
- switch (lfhint) { \
- case ia64_lfhint_none: \
- __asm__ __volatile__ ("lfetch [%0]" : : "r"(y)); \
- break; \
- case ia64_lfhint_nt1: \
- __asm__ __volatile__ ("lfetch.nt1 [%0]" : : "r"(y)); \
- break; \
- case ia64_lfhint_nt2: \
- __asm__ __volatile__ ("lfetch.nt2 [%0]" : : "r"(y)); \
- break; \
- case ia64_lfhint_nta: \
- __asm__ __volatile__ ("lfetch.nta [%0]" : : "r"(y)); \
- break; \
- } \
+#define ia64_lfetch(lfhint, y) \
+({ \
+ switch (lfhint) { \
+ case ia64_lfhint_none: \
+ asm volatile ("lfetch [%0]" : : "r"(y)); \
+ break; \
+ case ia64_lfhint_nt1: \
+ asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
+ break; \
+ case ia64_lfhint_nt2: \
+ asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
+ break; \
+ case ia64_lfhint_nta: \
+ asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
+ break; \
+ } \
})
#define ia64_lfetch_excl(lfhint, y) \
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
- __asm__ __volatile__ ("lfetch.excl [%0]" :: "r"(y)); \
+ asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt1: \
- __asm__ __volatile__ ("lfetch.excl.nt1 [%0]" :: "r"(y));\
+ asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt2: \
- __asm__ __volatile__ ("lfetch.excl.nt2 [%0]" :: "r"(y));\
+ asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nta: \
- __asm__ __volatile__ ("lfetch.excl.nta [%0]" :: "r"(y));\
+ asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
break; \
} \
})
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
- __asm__ __volatile__ ("lfetch.fault [%0]" : : "r"(y)); \
+ asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt1: \
- __asm__ __volatile__ ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
+ asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt2: \
- __asm__ __volatile__ ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
+ asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nta: \
- __asm__ __volatile__ ("lfetch.fault.nta [%0]" : : "r"(y)); \
+ asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
break; \
} \
})
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
- __asm__ __volatile__ ("lfetch.fault.excl [%0]" :: "r"(y)); \
+ asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt1: \
- __asm__ __volatile__ ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
+ asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt2: \
- __asm__ __volatile__ ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
+ asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nta: \
- __asm__ __volatile__ ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
+ asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
break; \
} \
})
-#define ia64_intrin_local_irq_restore(x) \
-do { \
- __asm__ __volatile__ ("cmp.ne p6,p7=%0,r0;;" \
- "(p6) ssm psr.i;" \
- "(p7) rsm psr.i;;" \
- "(p6) srlz.d" \
- : : "r"((x)) \
- : "p6", "p7", "memory"); \
+#define ia64_intrin_local_irq_restore(x) \
+do { \
+ asm volatile (" cmp.ne p6,p7=%0,r0;;" \
+ "(p6) ssm psr.i;" \
+ "(p7) rsm psr.i;;" \
+ "(p6) srlz.d" \
+ :: "r"((x)) : "p6", "p7", "memory"); \
} while (0)
#endif /* _ASM_IA64_GCC_INTRIN_H */
#define _ASM_IA64_IA64REGS_H
/*
-** Register Names for getreg() and setreg()
-*/
+ * Register Names for getreg() and setreg().
+ *
+ * The "magic" numbers happen to match the values used by the Intel compiler's
+ * getreg()/setreg() intrinsics.
+ */
/* Special Registers */
#define _IA64_REG_PSR 1019
#define _IA64_REG_PSR_L 1019
- // General Integer Registers
+/* General Integer Registers */
-#define _IA64_REG_GP 1025 /* R1 */
-#define _IA64_REG_R8 1032 /* R8 */
-#define _IA64_REG_R9 1033 /* R9 */
-#define _IA64_REG_SP 1036 /* R12 */
-#define _IA64_REG_TP 1037 /* R13 */
+#define _IA64_REG_GP 1025 /* R1 */
+#define _IA64_REG_R8 1032 /* R8 */
+#define _IA64_REG_R9 1033 /* R9 */
+#define _IA64_REG_SP 1036 /* R12 */
+#define _IA64_REG_TP 1037 /* R13 */
- /* Application Registers */
+/* Application Registers */
#define _IA64_REG_AR_KR0 3072
#define _IA64_REG_AR_KR1 3073
#define _IA64_REG_AR_LC 3137
#define _IA64_REG_AR_EC 3138
- /* Control Registers */
+/* Control Registers */
#define _IA64_REG_CR_DCR 4096
#define _IA64_REG_CR_ITM 4097
#define _IA64_REG_CR_LRR0 4176
#define _IA64_REG_CR_LRR1 4177
- /* Indirect Registers for getindreg() and setindreg() */
+/* Indirect Registers for getindreg() and setindreg() */
#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */
#define _IA64_REG_INDR_DBR 9001
#define _IA64_REG_INDR_PMD 9005
#define _IA64_REG_INDR_RR 9006
-
#endif /* _ASM_IA64_IA64REGS_H */
/* include compiler specific intrinsics */
#include <asm/ia64regs.h>
#ifdef __INTEL_COMPILER
-#include <asm/intel_intrin.h>
+#
include <asm/intel_intrin.h>
#else
-#include <asm/gcc_intrin.h>
+#
include <asm/gcc_intrin.h>
#endif
/*
* This function doesn't exist, so you'll get a linker error
* if something tries to do an invalid cmpxchg().
*/
-extern long ia64_cmpxchg_called_with_bad_pointer(void);
+extern long ia64_cmpxchg_called_with_bad_pointer (void);
#define ia64_cmpxchg(sem,ptr,old,new,size) \
({ \
# ifdef __KERNEL__
+#include <asm/intrinsics.h>
#include <asm/machvec.h>
#include <asm/page.h>
#include <asm/system.h>
-#include <asm/intrinsics.h>
/*
* Change virtual addresses to physical addresses and vv.
#include <linux/config.h>
-#include <asm/types.h>
#include <asm/intrinsics.h>
+#include <asm/types.h>
/*
* PAGE_SHIFT determines the actual kernel page size.
#include <linux/config.h>
-#include <asm/ptrace.h>
+#include <asm/intrinsics.h>
#include <asm/kregs.h>
+#include <asm/ptrace.h>
#include <asm/ustack.h>
-#include <asm/intrinsics.h>
#define IA64_NUM_DBG_REGS 8
/*
/* Return stack pointer of blocked task TSK. */
#define KSTK_ESP(tsk) ((tsk)->thread.ksp)
-extern void ia64_getreg_unknown_kr(void);
-extern void ia64_setreg_unknown_kr(void);
-
+extern void ia64_getreg_unknown_kr (void);
+extern void ia64_setreg_unknown_kr (void);
#define ia64_get_kr(regnum) \
({ \
- unsigned long r=0; \
+ unsigned long r = 0; \
\
switch (regnum) { \
case 0: r = ia64_getreg(_IA64_REG_AR_KR0); break; \
/* XXX remove the handcoded version once we have a sufficiently clever compiler... */
#ifdef SMART_COMPILER
-# define ia64_rotr(w,n) \
- ({ \
- __u64 _w = (w), _n = (n); \
- \
- (_w >> _n) | (_w << (64 - _n)); \
+# define ia64_rotr(w,n) \
+ ({ \
+ __u64 __ia64_rotr_w = (w), _n = (n); \
+ \
+ (__ia64_rotr_w >> _n) | (__ia64_rotr_w << (64 - _n)); \
})
#else
-# define ia64_rotr(w,n) \
- ({ \
- __u64 result; \
- result = ia64_shrp((w), (w), (n)); \
- result; \
+# define ia64_rotr(w,n) \
+ ({ \
+ __u64 __ia64_rotr_w; \
+ __ia64_rotr_w = ia64_shrp((w), (w), (n)); \
+ __ia64_rotr_w; \
})
#endif
#include <linux/list.h>
#include <linux/spinlock.h>
+
#include <asm/intrinsics.h>
/*
static inline void
__down_read (struct rw_semaphore *sem)
{
- int result;
-
- result = ia64_fetchadd4_acq((unsigned int *)&sem->count, 1);
+ int result = ia64_fetchadd4_acq((unsigned int *)&sem->count, 1);
if (result < 0)
rwsem_down_read_failed(sem);
static inline void
__up_read (struct rw_semaphore *sem)
{
- int result;
-
- result = ia64_fetchadd4_rel((unsigned int *)&sem->count, -1);
+ int result = ia64_fetchadd4_rel((unsigned int *)&sem->count, -1);
if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
rwsem_wake(sem);
* si_code is non-zero and __ISR_VALID is set in si_flags.
*/
#define si_isr _sifields._sigfault._isr
-#define si_pfm_ovfl _sifields._sigprof._pfm_ovfl_counters
/*
* Flag values for si_flags:
unsigned long bits;
} lid;
- lid.bits = ia64_getreg(_IA64_REG_CR_LID);
+ lid.bits = ia64_getreg(_IA64_REG_CR_LID);
return lid.f.id << 8 | lid.f.eid;
}
* This file is used for SMP configurations only.
*/
-#include <linux/kernel.h>
#include <linux/compiler.h>
+#include <linux/kernel.h>
-#include <asm/system.h>
-#include <asm/bitops.h>
#include <asm/atomic.h>
+#include <asm/bitops.h>
#include <asm/intrinsics.h>
+#include <asm/system.h>
typedef struct {
volatile unsigned int lock;
/* clearing psr.i is implicitly serialized (visible by next insn) */
/* setting psr.i requires data serialization */
-#define __local_irq_save(x) \
-do { \
- unsigned long psr; \
- psr = ia64_getreg(_IA64_REG_PSR); \
- ia64_stop(); \
- ia64_rsm(IA64_PSR_I); \
- (x) = psr; \
+#define __local_irq_save(x) \
+do { \
+ (x) = ia64_getreg(_IA64_REG_PSR); \
+ ia64_stop(); \
+ ia64_rsm(IA64_PSR_I); \
} while (0)
-#define __local_irq_disable() \
-do { \
- ia64_stop(); \
- ia64_rsm(IA64_PSR_I); \
+#define __local_irq_disable() \
+do { \
+ ia64_stop(); \
+ ia64_rsm(IA64_PSR_I); \
} while (0)
#define __local_irq_restore(x) ia64_intrin_local_irq_restore((x) & IA64_PSR_I)
#endif /* !CONFIG_IA64_DEBUG_IRQ */
#define local_irq_enable() ({ ia64_ssm(IA64_PSR_I); ia64_srlz_d(); })
-#define local_save_flags(flags) ({ (flags) = ia64_getreg(_IA64_REG_PSR); })
+#define local_save_flags(flags) ((flags) = ia64_getreg(_IA64_REG_PSR))
#define irqs_disabled() \
({ \
- unsigned long flags; \
- local_save_flags(flags); \
- (flags & IA64_PSR_I) == 0; \
+ unsigned long __ia64_id_flags; \
+ local_save_flags(__ia64_id_flags); \
+ (__ia64_id_flags & IA64_PSR_I) == 0; \
})
#ifdef __KERNEL__
* Also removed cacheflush_time as it's entirely unused.
*/
-#include <asm/processor.h>
#include <asm/intrinsics.h>
+#include <asm/processor.h>
typedef unsigned long cycles_t;
#include <linux/mm.h>
+#include <asm/intrinsics.h>
#include <asm/mmu_context.h>
#include <asm/page.h>
-#include <asm/intrinsics.h>
/*
* Now for some TLB flushing routines. This is the kind of stuff that
/*
* "Conditional" syscalls
*
- * Note, this macro can only be used in the
- * file which defines sys_ni_syscall, i.e., in kernel/sys.c.
+ * Note, this macro can only be used in the file which defines sys_ni_syscall, i.e., in
+ * kernel/sys.c. This version causes warnings because the declaration isn't a
+ * proper prototype, but we can't use __typeof__ either, because not all cond_syscall()
+ * declarations have prototypes at the moment.
*/
#define cond_syscall(x) asmlinkage long x() __attribute__((weak,alias("sys_ni_syscall")));
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