ASoC: sgtl5000: sort the register default table

reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch().  See commit
fd80df352ba1 ("regcache: Add support for sorting defaults arrays").

SGTL5000_CHIP_SHORT_CTRL (0x003c) is listed before
SGTL5000_CHIP_ANA_TEST2 (0x003a), which makes the former unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.

Sort the table by register address.

Fixes: 29aa37cddfb9 ("ASoC: sgtl5000: Fix the cache handling")
Cc: stable@vger.kernel.org
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://patch.msgid.link/20260805122728.12362-2-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index 59642673b4cbedf66614b7959eabea766f15ff43..35df1a8c4c8c6d463d5a4384a1abf051f539841f 100644 (file)
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -56,8 +56,8 @@ static const struct reg_default sgtl5000_reg_defaults[] = {
        { SGTL5000_CHIP_PLL_CTRL,               0x5000 },
        { SGTL5000_CHIP_CLK_TOP_CTRL,           0x0000 },
        { SGTL5000_CHIP_ANA_STATUS,             0x0000 },
-       { SGTL5000_CHIP_SHORT_CTRL,             0x0000 },
        { SGTL5000_CHIP_ANA_TEST2,              0x0000 },
+       { SGTL5000_CHIP_SHORT_CTRL,             0x0000 },
        { SGTL5000_DAP_CTRL,                    0x0000 },
        { SGTL5000_DAP_PEQ,                     0x0000 },
        { SGTL5000_DAP_BASS_ENHANCE,            0x0040 },