void sn_dma_flush_init(unsigned long start, unsigned long end, int idx, int pin, int slot);
+#define IS_OPUS(nasid) (cbrick_type_get_nasid(nasid) == MODULE_OPUSBRICK)
+#define IS_ALTIX(nasid) (cbrick_type_get_nasid(nasid) == MODULE_CBRICK)
/*
* pci_bus_cvlink_init() - To be called once during initialization before
#include <asm/sn/xtalk/xbow.h>
-#define LDEBUG 0
-#define NIC_UNKNOWN ((nic_t) -1)
-
#undef DEBUG_KLGRAPH
#ifdef DEBUG_KLGRAPH
#define DBG(x...) printk(x)
static int hasmetarouter;
-char brick_types[MAX_BRICK_TYPES + 1] = "crikxdpn%#=012345";
+char brick_types[MAX_BRICK_TYPES + 1] = "crikxdpn%#=vo^34567890123456789...";
lboard_t *
find_lboard(lboard_t *start, unsigned char brd_type)
board_name = EDGE_LBL_PXBRICK;
else if (brd->brd_type == KLTYPE_IXBRICK)
board_name = EDGE_LBL_IXBRICK;
+ else if (brd->brd_type == KLTYPE_OPUSBRICK)
+ board_name = EDGE_LBL_OPUSBRICK;
else if (brd->brd_type == KLTYPE_CGBRICK)
board_name = EDGE_LBL_CGBRICK;
- else
+ else
board_name = EDGE_LBL_IOBRICK;
break;
default:
sprintf(path, EDGE_LBL_MODULE "/%s/" EDGE_LBL_SLAB "/%d/%s", buffer, geo_slab(brd->brd_geoid), board_name);
}
-/*
- * Get the module number for a NASID.
- */
-moduleid_t
-get_module_id(nasid_t nasid)
-{
- lboard_t *brd;
-
- brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
-
- if (!brd)
- return INVALID_MODULE;
- else
- return geo_module(brd->brd_geoid);
-}
-
-
#define MHZ 1000000
*rack = (result & MODULE_RACK_MASK) >> MODULE_RACK_SHFT;
*bay = (result & MODULE_BPOS_MASK) >> MODULE_BPOS_SHFT;
*brick_type = (result & MODULE_BTYPE_MASK) >> MODULE_BTYPE_SHFT;
- *brick_type = toupper(*brick_type);
-
return 0;
}
return result;
}
-int iobrick_module_get(nasid_t nasid)
-{
- uint rnum, rack, bay, brick_type, t;
- int ret;
-
- /* construct module ID from rack and slot info */
-
- if ((ret = iobrick_rack_bay_type_get(nasid, &rnum, &bay, &brick_type)) < 0)
- return ret;
-
- if (bay > MODULE_BPOS_MASK >> MODULE_BPOS_SHFT)
- return ELSC_ERROR_MODULE;
-
- /* Build a moduleid_t-compatible rack number */
-
- rack = 0;
- t = rnum / 100; /* rack class (CPU/IO) */
- if (t > RACK_CLASS_MASK(rack) >> RACK_CLASS_SHFT(rack))
- return ELSC_ERROR_MODULE;
- RACK_ADD_CLASS(rack, t);
- rnum %= 100;
-
- t = rnum / 10; /* rack group */
- if (t > RACK_GROUP_MASK(rack) >> RACK_GROUP_SHFT(rack))
- return ELSC_ERROR_MODULE;
- RACK_ADD_GROUP(rack, t);
-
- t = rnum % 10; /* rack number (one-based) */
- if (t-1 > RACK_NUM_MASK(rack) >> RACK_NUM_SHFT(rack))
- return ELSC_ERROR_MODULE;
- RACK_ADD_NUM(rack, t);
-
- switch( brick_type ) {
- case L1_BRICKTYPE_IX:
- brick_type = MODULE_IXBRICK; break;
- case L1_BRICKTYPE_PX:
- brick_type = MODULE_PXBRICK; break;
- }
-
- ret = RBT_TO_MODULE(rack, bay, brick_type);
-
- return ret;
-}
-
-/*
- * iobrick_module_get_nasid() returns a module_id which has the brick
- * type encoded in bits 15-12, but this is not the true brick type...
- * The module_id returned by iobrick_module_get_nasid() is modified
- * to make a PEBRICKs & PXBRICKs look like a PBRICK. So this routine
- * iobrick_type_get_nasid() returns the true unmodified brick type.
- */
int
iobrick_type_get_nasid(nasid_t nasid)
{
return -1; /* unknown brick */
}
-int iobrick_module_get_nasid(nasid_t nasid)
-{
- int io_moduleid;
-
- io_moduleid = iobrick_module_get(nasid);
- return io_moduleid;
-}
-
/*
* given a L1 bricktype, return a bricktype string. This string is the
* string that will be used in the hwpath for I/O bricks
return("Unknown");
case L1_BRICKTYPE_PX:
- return("PXbrick");
+ return(EDGE_LBL_PXBRICK);
+
+ case L1_BRICKTYPE_OPUS:
+ return(EDGE_LBL_OPUSBRICK);
case L1_BRICKTYPE_IX:
- return("IXbrick");
+ return(EDGE_LBL_IXBRICK);
case L1_BRICKTYPE_C:
return("Cbrick");
#define DBG(x...)
#endif /* IOGRAPH_DEBUG */
-/* #define PROBE_TEST */
-
/* At most 2 hubs can be connected to an xswitch */
#define NUM_XSWITCH_VOLUNTEER 2
{
xswitch_vol_t xvolinfo;
int rc;
- extern void snia_kmem_free(void *ptr, size_t size);
rc = hwgraph_info_remove_LBL(xswitch,
INFO_LBL_XSWITCH_VOL,
INFO_LBL_XSWITCH_VOL,
(arbitrary_info_t *)&xvolinfo);
if (xvolinfo == NULL) {
- if (!is_headless_node_vertex(master))
+ if (!is_headless_node_vertex(master)) {
+ char name[MAXDEVNAME];
printk(KERN_WARNING
- "volunteer for widgets: vertex 0x%p has no info label",
- (void *)xswitch);
+ "volunteer for widgets: vertex %s has no info label",
+ vertex_to_name(xswitch, name, MAXDEVNAME));
+ }
return;
}
INFO_LBL_XSWITCH_VOL,
(arbitrary_info_t *)&xvolinfo);
if (xvolinfo == NULL) {
- if (!is_headless_node_vertex(hubv))
+ if (!is_headless_node_vertex(hubv)) {
+ char name[MAXDEVNAME];
printk(KERN_WARNING
- "assign_widgets_to_volunteers:vertex 0x%p has "
+ "assign_widgets_to_volunteers:vertex %s has "
" no info label",
- (void *)xswitch);
+ vertex_to_name(xswitch, name, MAXDEVNAME));
+ }
return;
}
for (widgetnum=HUB_WIDGET_ID_MIN; widgetnum <= HUB_WIDGET_ID_MAX; widgetnum++) {
int i;
- /*
- * Ignore disabled/empty ports.
- */
if (!xbow_port_io_enabled(nasid, widgetnum))
continue;
if (nasid == get_master_baseio_nasid())
goto do_assignment;
}
- panic("Nasid == %d, console nasid == %d",
+ printk("Nasid == %d, console nasid == %d",
nasid, get_master_baseio_nasid());
+ nasid = 0;
}
/*
buffer,
geo_slab(board->brd_geoid),
(board->brd_type == KLTYPE_PXBRICK) ? EDGE_LBL_PXBRICK :
- (board->brd_type == KLTYPE_IXBRICK) ? EDGE_LBL_IXBRICK : "?brick",
+ (board->brd_type == KLTYPE_IXBRICK) ? EDGE_LBL_IXBRICK :
+ (board->brd_type == KLTYPE_CGBRICK) ? EDGE_LBL_CGBRICK :
+ (board->brd_type == KLTYPE_OPUSBRICK) ? EDGE_LBL_OPUSBRICK : "?brick",
EDGE_LBL_XTALK, widgetnum);
DBG("io_xswitch_widget_init: path= %s\n", pathname);
(void)xwidget_register(&hwid, widgetv, widgetnum,
hubv, hub_widgetid);
- ia64_sn_sysctl_iobrick_module_get(nasid, &io_module);
-
+ io_module = iomoduleid_get(nasid);
if (io_module >= 0) {
char buffer[16];
vertex_hdl_t to, from;
memset(buffer, 0, 16);
format_module_id(buffer, geo_module(board->brd_geoid), MODULE_FORMAT_BRIEF);
- if ( islower(MODULE_GET_BTCHAR(io_module)) ) {
- bt = toupper(MODULE_GET_BTCHAR(io_module));
+ if ( isupper(MODULE_GET_BTCHAR(io_module)) ) {
+ bt = tolower(MODULE_GET_BTCHAR(io_module));
}
else {
bt = MODULE_GET_BTCHAR(io_module);
ASSERT_ALWAYS(to);
rc = hwgraph_edge_add(from, to,
EDGE_LBL_INTERCONNECT);
- if (rc == -EEXIST)
- goto link_done;
- if (rc != GRAPH_SUCCESS) {
+ if (rc != -EEXIST && rc != GRAPH_SUCCESS) {
printk("%s: Unable to establish link"
" for xbmon.", pathname);
}
-link_done:
}
-#ifdef SN0_USE_BTE
- bte_bpush_war(cnode, (void *)board);
-#endif
}
}
ASSERT(hubv != GRAPH_VERTEX_NONE);
- /*
- * Read mfg info on this hub
- */
-
/*
* If nothing connected to this hub's xtalk port, we're done.
*/
early_probe_for_widget(hubv, &hwid);
if (hwid.part_num == XWIDGET_PART_NUM_NONE) {
-#ifdef PROBE_TEST
- if ((cnodeid == 1) || (cnodeid == 2)) {
- int index;
-
- for (index = 0; index < 600; index++)
- DBG("Interfering with device probing!!!\n");
- }
-#endif
DBG("**** io_init_node: Node's 0x%p hub widget has XWIDGET_PART_NUM_NONE ****\n", hubv);
return;
/* NOTREACHED */
down(&npdap->xbow_sema);
}
-#ifdef PROBE_TEST
- if ((cnodeid == 1) || (cnodeid == 2)) {
- int index;
-
- for (index = 0; index < 500; index++)
- DBG("Interfering with device probing!!!\n");
- }
-#endif
/* Now both nodes can safely inititialize widgets */
io_init_xswitch_widgets(switchv, cnodeid);
io_link_xswitch_widgets(switchv, cnodeid);
}
#include <asm/sn/ioerror_handling.h>
-/* #endif */
/*
* Initialize all I/O devices. Starting closest to nodes, probe and
void
init_all_devices(void)
{
- /* Governor on init threads..bump up when safe
- * (beware many devfs races)
- */
cnodeid_t cnodeid, active;
active = 0;
DBG("init_all_devices: Done io_init_node() for cnode %d\n", cnodeid);
}
- for (cnodeid = 0; cnodeid < numnodes; cnodeid++)
+ for (cnodeid = 0; cnodeid < numnodes; cnodeid++) {
/*
* Update information generated by IO init.
*/
update_node_information(cnodeid);
-
-#if HWG_PRINT
- hwgraph_print();
-#endif
-
+ }
}
static
}
},
+/* OPUSbrick widget number to PCI bus number map */
+ { MODULE_OPUSBRICK, /* OPUSbrick type */
+ /* PCI Bus # Widget # */
+ { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
+ 0, /* 0x8 */
+ 0, /* 0x9 */
+ 0, 0, /* 0xa - 0xb */
+ 0, /* 0xc */
+ 0, /* 0xd */
+ 0, /* 0xe */
+ 1 /* 0xf */
+ }
+ },
+
/* IXbrick widget number to PCI bus number map */
{ MODULE_IXBRICK, /* IXbrick type */
/* PCI Bus # Widget # */
3 /* 0xf */
}
},
+
+/* CG brick widget number to PCI bus number map */
+ { MODULE_CGBRICK, /* CG brick */
+ /* PCI Bus # Widget # */
+ { 0, 0, 0, 0, 0, 0, 0, 0, /* 0x0 - 0x7 */
+ 0, /* 0x8 */
+ 0, /* 0x9 */
+ 0, 1, /* 0xa - 0xb */
+ 0, /* 0xc */
+ 0, /* 0xd */
+ 0, /* 0xe */
+ 0 /* 0xf */
+ }
+ },
};
/*
#endif
nasid_t nasid;
int iobrick_type_get_nasid(nasid_t nasid);
- int iobrick_module_get_nasid(nasid_t nasid);
+ int iomoduleid_get(nasid_t nasid);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, pcibr_vhdl,
"pcibr_attach2: bridge=0x%p, busnum=%d\n", bridge, busnum));
printk(KERN_WARNING "0x%p: Unknown bricktype : 0x%x\n", (void *)xconn_vhdl,
(unsigned int)pcibr_soft->bs_bricktype);
- pcibr_soft->bs_moduleid = iobrick_module_get_nasid(nasid);
+ pcibr_soft->bs_moduleid = iomoduleid_get(nasid);
if (pcibr_soft->bs_bricktype > 0) {
switch (pcibr_soft->bs_bricktype) {
vertex_hdl_t pcibr_vhdl0, pcibr_vhdl1 = (vertex_hdl_t)0;
pcibr_soft_t bus0_soft, bus1_soft = (pcibr_soft_t)0;
vertex_hdl_t conn_v0, conn_v1, peer_conn_v;
+ int bricktype;
+ int iobrick_type_get_nasid(nasid_t nasid);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v, "pic_attach()\n"));
* Opening this vertex will provide access to
* the Bridge registers themselves.
*/
- /* FIXME: what should the hwgraph path look like ? */
- rc = hwgraph_path_add(conn_v0, EDGE_LBL_PCIX_0, &pcibr_vhdl0);
- ASSERT(rc == GRAPH_SUCCESS);
- rc = hwgraph_path_add(conn_v1, EDGE_LBL_PCIX_1, &pcibr_vhdl1);
- ASSERT(rc == GRAPH_SUCCESS);
+ bricktype = iobrick_type_get_nasid(NASID_GET(bridge0));
+ if ( bricktype == MODULE_CGBRICK ) {
+ rc = hwgraph_path_add(conn_v0, EDGE_LBL_AGP_0, &pcibr_vhdl0);
+ ASSERT(rc == GRAPH_SUCCESS);
+ rc = hwgraph_path_add(conn_v1, EDGE_LBL_AGP_1, &pcibr_vhdl1);
+ ASSERT(rc == GRAPH_SUCCESS);
+ } else {
+ rc = hwgraph_path_add(conn_v0, EDGE_LBL_PCIX_0, &pcibr_vhdl0);
+ ASSERT(rc == GRAPH_SUCCESS);
+ rc = hwgraph_path_add(conn_v1, EDGE_LBL_PCIX_1, &pcibr_vhdl1);
+ ASSERT(rc == GRAPH_SUCCESS);
+ }
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_ATTACH, conn_v,
"pic_attach: pcibr_vhdl0=%v, pcibr_vhdl1=%v\n",
#define EDGE_LBL_PCIX "pci-x"
#define EDGE_LBL_PCIX_0 EDGE_LBL_PCIX "/0"
#define EDGE_LBL_PCIX_1 EDGE_LBL_PCIX "/1"
+#define EDGE_LBL_AGP "agp"
+#define EDGE_LBL_AGP_0 EDGE_LBL_AGP "/0"
+#define EDGE_LBL_AGP_1 EDGE_LBL_AGP "/1"
#define EDGE_LBL_PORT "port"
#define EDGE_LBL_PROM "prom"
#define EDGE_LBL_RACK "rack"
#define EDGE_LBL_XPLINK_ADMIN "admin" /* Partition admin */
#define EDGE_LBL_IOBRICK "iobrick"
#define EDGE_LBL_PXBRICK "PXbrick"
+#define EDGE_LBL_OPUSBRICK "onboardio"
#define EDGE_LBL_IXBRICK "IXbrick"
#define EDGE_LBL_CGBRICK "CGbrick"
#define EDGE_LBL_CPUBUS "cpubus" /* CPU Interfaces (SysAd) */
#define INFO_LBL_CPUID "_cpuid"
#define INFO_LBL_CPU_INFO "_cpu"
#define INFO_LBL_DETAIL_INVENT "_detail_invent" /* inventory data*/
-#define INFO_LBL_DEVICE_DESC "_device_desc"
-#define INFO_LBL_DIAGVAL "_diag_reason" /* Reason disabled */
-#define INFO_LBL_DKIOTIME "_dkiotime"
+#define INFO_LBL_DIAGVAL "_diag_reason" /* Reason disabled */
#define INFO_LBL_DRIVER "_driver" /* points to attached device_driver_t */
#define INFO_LBL_ELSC "_elsc"
#define INFO_LBL_SUBCH "_subch" /* system controller subchannel */
* thread priority
* default class
*/
-/* Special reserved info labels (also hwgfs attributes) */
-#define _DEVNAME_ATTR "_devname" /* device name */
-#define _DRIVERNAME_ATTR "_drivername" /* driver name */
-#define _INVENT_ATTR "_inventory" /* device inventory data */
-#define _MASTERNODE_ATTR "_masternode" /* node that "controls" device */
-
/* Info labels that begin with '_' cannot be overwritten by an attr_set call */
#define INFO_LBL_RESERVED(name) ((name)[0] == '_')
#define KLTYPE_PXBRICK (KLCLASS_IOBRICK | 0x6)
#define KLTYPE_IXBRICK (KLCLASS_IOBRICK | 0x7)
#define KLTYPE_CGBRICK (KLCLASS_IOBRICK | 0x8)
+#define KLTYPE_OPUSBRICK (KLCLASS_IOBRICK | 0x9)
#define KLTYPE_PBRICK_BRIDGE KLTYPE_PBRICK
#define L1_BRICKTYPE_IP45 0x34 /* 4 */
#define L1_BRICKTYPE_C 0x43 /* C */
#define L1_BRICKTYPE_R 0x52 /* R */
-#define L1_BRICKTYPE_CHI_CG 0x76 /* v */
+#define L1_BRICKTYPE_CHI_CG 0x76 /* v */
#define L1_BRICKTYPE_N 0x4e /* N */
#define L1_BRICKTYPE_PX 0x23 /* # */
#define L1_BRICKTYPE_IX 0x3d /* = */
+#define L1_BRICKTYPE_OPUS 0x6f /* o */
/* EEPROM codes (for the "read EEPROM" request) */
/* c brick */
int elsc_display_line(nasid_t nasid, char *line, int lnum);
int iobrick_rack_bay_type_get( nasid_t nasid, unsigned int *rack,
unsigned int *bay, unsigned int *brick_type );
-int iobrick_module_get( nasid_t nasid );
+int iomoduleid_get( nasid_t nasid );
#endif /* _ASM_IA64_SN_KSYS_L1_H */
#define MODULE_PEBRICK 8
#define MODULE_PXBRICK 9
#define MODULE_IXBRICK 10
+#define MODULE_CGBRICK 11
+#define MODULE_OPUSBRICK 12
/*
* Moduleid_t comparison macros
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