drm/amd/display: Enable HUBP/DPP Driver PG for DCN42

[Why & How]
The related corruption issue is now resolved, HUBP/DPP driver PG can be enabled for DCN42.

Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Leo Chen <leo.chen@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
index e40e246bcc82c252e5ef6e8ce0545a9bd481d913..547a0b8165390a2facc1d98052f19a2257f4d20f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c
@@ -729,8 +729,8 @@ static const struct dc_debug_options debug_defaults_drv = {
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .ignore_pg = false,
-       .disable_dpp_power_gate = true,
-       .disable_hubp_power_gate = true,
+       .disable_dpp_power_gate = false,
+       .disable_hubp_power_gate = false,
        .disable_optc_power_gate = true,
        .disable_dsc_power_gate = false,
        .disable_dio_power_gate = true,