[PATCH] cciss: IRQ sharing fix

From: mikem@beardog.cca.cpqcorp.net

This patch fixes a bug when sharing IRQs with another controller that
receives a lot of interrupts.  Without this check we will panic the system
when unloading and reloading the driver.  This is in 2.4.

diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index e26566a53bb0db087024d75b60cc6127cee84d7b..2b4f6ba3a6bb3b6e473750fbd41ad15eeaa62057 100644 (file)
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -1983,7 +1983,7 @@ static irqreturn_t do_cciss_intr(int irq, void *dev_id, struct pt_regs *regs)
 
 
        /* Is this interrupt for us? */
-       if ( h->access.intr_pending(h) == 0)
+       if (( h->access.intr_pending(h) == 0) || (h->interrupts_enabled == 0))
                return IRQ_NONE;
 
        /*

diff --git a/drivers/block/cciss.h b/drivers/block/cciss.h
index 16bf4638ade8488d4267257f5a579db410cfbe4a..f37ad3dfa1daaddfa137769c6546e16a48a50a54 100644 (file)
--- a/drivers/block/cciss.h
+++ b/drivers/block/cciss.h
@@ -48,7 +48,7 @@ struct ctlr_info
        unsigned long io_mem_length;
        CfgTable_struct *cfgtable;
        int     intr;
-
+       int     interrupts_enabled;
        int     max_commands;
        int     commands_outstanding;
        int     max_outstanding; /* Debug */ 
@@ -134,9 +134,11 @@ static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
 {
        if (val) 
        { /* Turn interrupts on */
+               h->interrupts_enabled = 1;
                writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        } else /* Turn them off */
        {
+               h->interrupts_enabled = 0;
                writel( SA5_INTR_OFF, 
                        h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        }
@@ -150,9 +152,11 @@ static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
 {
         if (val)
         { /* Turn interrupts on */
+               h->interrupts_enabled = 1;
                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
         } else /* Turn them off */
         {
+               h->interrupts_enabled = 0;
                 writel( SA5B_INTR_OFF,
                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
         }