#undef MAX_HWIFS
#define MAX_HWIFS 2
-static __inline__ int ide_default_irq(ide_ioreg_t base)
+static __inline__ int ide_default_irq(unsigned long base)
{
return 0;
}
-static __inline__ ide_ioreg_t ide_default_io_base(int index)
+static __inline__ unsigned long ide_default_io_base(int index)
{
return 0;
}
* Doing any sort of ioremap() here does not work
* because this function may be called with null aguments.
*/
-static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
+static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
{
- ide_ioreg_t reg = data_port;
+ unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
- hw->io_ports[IDE_CONTROL_OFFSET] = 0;
+ hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
int index;
for (index = 0; index < MAX_HWIFS; index++) {
+ memset(&hw, 0, sizeof hw);
ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
#endif
}
-#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
-#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
-#define ide_check_region(from,extent) check_region((from), (extent))
-#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
-#define ide_release_region(from,extent) release_region((from), (extent))
+#define __ide_insl(data_reg, buffer, wcount) \
+ __ide_insw(data_reg, buffer, (wcount)<<1)
+#define __ide_outsl(data_reg, buffer, wcount) \
+ __ide_outsw(data_reg, buffer, (wcount)<<1)
-/*
- * The following is not needed for the non-m68k ports
- */
-#define ide_ack_intr(hwif) (1)
+/* On sparc, I/O ports and MMIO registers are accessed identically. */
+#define __ide_mm_insw __ide_insw
+#define __ide_mm_insl __ide_insl
+#define __ide_mm_outsw __ide_outsw
+#define __ide_mm_outsl __ide_outsl
-/* XXX Known to be broken. Axboe will fix the problems this
- * XXX has by making separate IN/OUT macros for IDE_DATA
- * XXX register and rest of IDE regs and also using
- * XXX ide_ioreg_t instead of u32 for ports. -DaveM
- */
+static __inline__ void __ide_insw(unsigned long port,
+ void *dst,
+ unsigned long count)
+{
+ volatile unsigned short *data_port;
+ /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */
+ u16 *ps = dst;
+ u32 *pi;
+
+ data_port = (volatile unsigned short *)port;
-#define HAVE_ARCH_IN_BYTE
-#define IN_BYTE(p) (*((volatile u8 *)(p)))
-#define IN_WORD(p) (*((volatile u16 *)(p)))
-#define IN_LONG(p) (*((volatile u32 *)(p)))
-#define IN_BYTE_P IN_BYTE
-#define IN_WORD_P IN_WORD
-#define IN_LONG_P IN_LONG
-
-#define HAVE_ARCH_OUT_BYTE
-#define OUT_BYTE(b,p) ((*((volatile u8 *)(p))) = (b))
-#define OUT_WORD(w,p) ((*((volatile u16 *)(p))) = (w))
-#define OUT_LONG(l,p) ((*((volatile u32 *)(p))) = (l))
-#define OUT_BYTE_P OUT_BYTE
-#define OUT_WORD_P OUT_WORD
-#define OUT_LONG_P OUT_LONG
+ if(((unsigned long)ps) & 0x2) {
+ *ps++ = *data_port;
+ count--;
+ }
+ pi = (u32 *)ps;
+ while(count >= 2) {
+ u32 w;
+
+ w = (*data_port) << 16;
+ w |= (*data_port);
+ *pi++ = w;
+ count -= 2;
+ }
+ ps = (u16 *)pi;
+ if(count)
+ *ps++ = *data_port;
+
+ /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */
+}
+
+static __inline__ void __ide_outsw(unsigned long port,
+ const void *src,
+ unsigned long count)
+{
+ volatile unsigned short *data_port;
+ /* unsigned long end = (unsigned long)src + (count << 1); */
+ const u16 *ps = src;
+ const u32 *pi;
+
+ data_port = (volatile unsigned short *)port;
+
+ if(((unsigned long)src) & 0x2) {
+ *data_port = *ps++;
+ count--;
+ }
+ pi = (const u32 *)ps;
+ while(count >= 2) {
+ u32 w;
+
+ w = *pi++;
+ *data_port = (w >> 16);
+ *data_port = w;
+ count -= 2;
+ }
+ ps = (const u16 *)pi;
+ if(count)
+ *data_port = *ps;
+
+ /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */
+}
#endif /* __KERNEL__ */
-/* $Id: ide.h,v 1.22 2002/01/16 20:58:40 davem Exp $
+/* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
* ide.h: Ultra/PCI specific IDE glue.
*
* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
#undef MAX_HWIFS
#define MAX_HWIFS 2
-static __inline__ int ide_default_irq(ide_ioreg_t base)
+static __inline__ int ide_default_irq(unsigned long base)
{
return 0;
}
-static __inline__ ide_ioreg_t ide_default_io_base(int index)
+static __inline__ unsigned long ide_default_io_base(int index)
{
return 0;
}
-static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
+static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
{
- ide_ioreg_t reg = data_port;
+ unsigned long reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
- hw->io_ports[IDE_CONTROL_OFFSET] = 0;
+ hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
}
if (irq != NULL)
*irq = 0;
*/
static __inline__ void ide_init_default_hwifs(void)
{
-#ifndef CONFIG_PCI
+#ifndef CONFIG_BLK_DEV_IDEPCI
hw_regs_t hw;
int index;
for (index = 0; index < MAX_HWIFS; index++) {
+ memset(&hw, 0, sizeof hw);
ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
hw.irq = ide_default_irq(ide_default_io_base(index));
ide_register_hw(&hw, NULL);
}
-#endif
+#endif /* CONFIG_BLK_DEV_IDEPCI */
}
+#define __ide_insl(data_reg, buffer, wcount) \
+ __ide_insw(data_reg, buffer, (wcount)<<1)
+#define __ide_outsl(data_reg, buffer, wcount) \
+ __ide_outsw(data_reg, buffer, (wcount)<<1)
-#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
-#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
-#define ide_check_region(from,extent) check_region((from), (extent))
-#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
-#define ide_release_region(from,extent) release_region((from), (extent))
-
-/*
- * The following is not needed for the non-m68k ports
- */
-#define ide_ack_intr(hwif) (1)
+/* On sparc64, I/O ports and MMIO registers are accessed identically. */
+#define __ide_mm_insw __ide_insw
+#define __ide_mm_insl __ide_insl
+#define __ide_mm_outsw __ide_outsw
+#define __ide_mm_outsl __ide_outsl
-/* XXX Known to be broken. Axboe will fix the problems this
- * XXX has by making separate IN/OUT macros for IDE_DATA
- * XXX register and rest of IDE regs and also using
- * XXX ide_ioreg_t instead of u32 for ports. -DaveM
- */
+static __inline__ unsigned int inw_be(unsigned long addr)
+{
+ unsigned int ret;
-#define HAVE_ARCH_IN_BYTE
-static __inline__ u8 IN_BYTE(ide_ioreg_t addr)
-{ u8 ret;
- __asm__ __volatile__("lduba [%1] %2, %0\t/* ide_in_byte */"
- : "=r" (ret)
- : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
- return ret;
-}
-static __inline__ u16 IN_WORD(ide_ioreg_t addr)
-{ u16 ret;
- __asm__ __volatile__("lduha [%1] %2, %0\t/* ide_in_word */"
- : "=r" (ret)
- : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
- return ret;
-}
-static __inline__ u16 IN_LONG(ide_ioreg_t addr)
-{ u32 ret;
- __asm__ __volatile__("lduwa [%1] %2, %0\t/* ide_in_long */"
+ __asm__ __volatile__("lduha [%1] %2, %0"
: "=r" (ret)
: "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+
return ret;
}
-#define IN_BYTE_P IN_BYTE
-#define IN_WORD_P IN_WORD
-#define IN_LONG_P IN_LONG
-#define HAVE_ARCH_OUT_BYTE
-static __inline__ void OUT_BYTE(u8 byte, ide_ioreg_t addr)
+static __inline__ void __ide_insw(unsigned long port,
+ void *dst,
+ u32 count)
{
- __asm__ __volatile__("stba %r0, [%1] %2\t/* ide_out_byte */"
- : /* no outputs */
- : "Jr" (byte), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
+ unsigned long end = (unsigned long)dst + (count << 1);
+#endif
+ u16 *ps = dst;
+ u32 *pi;
+
+ if(((u64)ps) & 0x2) {
+ *ps++ = inw_be(port);
+ count--;
+ }
+ pi = (u32 *)ps;
+ while(count >= 2) {
+ u32 w;
+
+ w = inw_be(port) << 16;
+ w |= inw_be(port);
+ *pi++ = w;
+ count -= 2;
+ }
+ ps = (u16 *)pi;
+ if(count)
+ *ps++ = inw_be(port);
+
+#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
+ __flush_dcache_range((unsigned long)dst, end);
+#endif
}
-static __inline__ void OUT_WORD(u16 word, ide_ioreg_t addr)
+
+static __inline__ void outw_be(unsigned short w, unsigned long addr)
{
- __asm__ __volatile__("stha %r0, [%1] %2\t/* ide_out_word */"
+ __asm__ __volatile__("stha %0, [%1] %2"
: /* no outputs */
- : "Jr" (word), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+ : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
}
-static __inline__ void OUT_LONG(u32 _long, ide_ioreg_t addr)
+
+static __inline__ void __ide_outsw(unsigned long port,
+ void *src,
+ u32 count)
{
- __asm__ __volatile__("stwa %r0, [%1] %2\t/* ide_out_long */"
- : /* no outputs */
- : "Jr" (_long), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
+#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
+ unsigned long end = (unsigned long)src + (count << 1);
+#endif
+ const u16 *ps = src;
+ const u32 *pi;
+
+ if(((u64)src) & 0x2) {
+ outw_be(*ps++, port);
+ count--;
+ }
+ pi = (const u32 *)ps;
+ while(count >= 2) {
+ u32 w;
+
+ w = *pi++;
+ outw_be((w >> 16), port);
+ outw_be(w, port);
+ count -= 2;
+ }
+ ps = (const u16 *)pi;
+ if(count)
+ outw_be(*ps, port);
+
+#if (L1DCACHE_SIZE > PAGE_SIZE) /* is there D$ aliasing problem */
+ __flush_dcache_range((unsigned long)src, end);
+#endif
}
-#define OUT_BYTE_P OUT_BYTE
-#define OUT_WORD_P OUT_WORD
-#define OUT_LONG_P OUT_LONG
#endif /* __KERNEL__ */
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