]> git.hungrycats.org Git - linux/commitdiff
x86/bugs: Rename SSBD_NO to SSB_NO
authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Thu, 17 May 2018 03:18:09 +0000 (23:18 -0400)
committerBen Hutchings <ben@decadent.org.uk>
Wed, 3 Oct 2018 03:09:49 +0000 (04:09 +0100)
commit 240da953fcc6a9008c92fae5b1f727ee5ed167ab upstream.

The "336996 Speculative Execution Side Channel Mitigations" from
May defines this as SSB_NO, hence lets sync-up.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[bwh: Backported to 3.16: adjust filename]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
arch/x86/include/uapi/asm/msr-index.h
arch/x86/kernel/cpu/common.c

index 95fc3da176e8cee0e7c4c49f5143fa805fb26c5e..353f76dcf8a709ae4275028981bd0add6f7eadcb 100644 (file)
@@ -59,7 +59,7 @@
 #define MSR_IA32_ARCH_CAPABILITIES     0x0000010a
 #define ARCH_CAP_RDCL_NO               (1 << 0)   /* Not susceptible to Meltdown */
 #define ARCH_CAP_IBRS_ALL              (1 << 1)   /* Enhanced IBRS support */
-#define ARCH_CAP_SSBD_NO               (1 << 4)   /*
+#define ARCH_CAP_SSB_NO                        (1 << 4)   /*
                                                    * Not susceptible to Speculative Store Bypass
                                                    * attack, so no Speculative Store Bypass
                                                    * control required.
index 7ab56efa6ed16497766c0bb535e744f13e2a0484..01c7438130e9902a0e01573bfe3097890e5a875e 100644 (file)
@@ -850,7 +850,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
                rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
        if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
-          !(ia32_cap & ARCH_CAP_SSBD_NO))
+          !(ia32_cap & ARCH_CAP_SSB_NO))
                setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
        if (x86_match_cpu(cpu_no_speculation))