[PATCH] ia64: tighten FPH state context switch check

In the absence of this patch, a process can set it's own mfh bit and
potentially view another process's high floating point registers. So a
check is needed.

Signed-off-by: Arun Sharma <arun.sharma@intel.com>
Signed-off-by: David Mosberger <davidm@hpl.hp.com>

diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h
index 2c53f8dc8046a21223b9e36ff7de028d7dda44f4..57c7db10a42ece7029a54279f80a8324e7a52d9c 100644 (file)
--- a/include/asm-ia64/system.h
+++ b/include/asm-ia64/system.h
@@ -239,7 +239,7 @@ extern void ia64_load_extra (struct task_struct *task);
  * the latest fph state from another CPU.  In other words: eager save, lazy restore.
  */
 # define switch_to(prev,next,last) do {                                                \
-       if (ia64_psr(ia64_task_regs(prev))->mfh) {                              \
+       if (ia64_psr(ia64_task_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) {                             \
                ia64_psr(ia64_task_regs(prev))->mfh = 0;                        \
                (prev)->thread.flags |= IA64_THREAD_FPH_VALID;                  \
                __ia64_save_fpu((prev)->thread.fph);                            \