drm/amd/pm: Fix the null pointer dereference for vega10_hwmgr

[ Upstream commit 50151b7f1c79a09117837eb95b76c2de76841dab ]

Check return value and conduct null pointer handling to avoid null pointer dereference.

Signed-off-by: Bob Zhou <bob.zhou@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
index 8d7dc0e5417ed1359edba54510d8fc4a7844fd72..f4acdb2267416f09581e6798e8727371189e4204 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
@@ -3418,13 +3418,17 @@ static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, co
        const struct vega10_power_state *vega10_ps =
                        cast_const_phw_vega10_power_state(states->pnew_state);
        struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table);
-       uint32_t sclk = vega10_ps->performance_levels
-                       [vega10_ps->performance_level_count - 1].gfx_clock;
        struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table);
-       uint32_t mclk = vega10_ps->performance_levels
-                       [vega10_ps->performance_level_count - 1].mem_clock;
+       uint32_t sclk, mclk;
        uint32_t i;
 
+       if (vega10_ps == NULL)
+               return -EINVAL;
+       sclk = vega10_ps->performance_levels
+                       [vega10_ps->performance_level_count - 1].gfx_clock;
+       mclk = vega10_ps->performance_levels
+                       [vega10_ps->performance_level_count - 1].mem_clock;
+
        for (i = 0; i < sclk_table->count; i++) {
                if (sclk == sclk_table->dpm_levels[i].value)
                        break;
@@ -3731,6 +3735,9 @@ static int vega10_generate_dpm_level_enable_mask(
                        cast_const_phw_vega10_power_state(states->pnew_state);
        int i;
 
+       if (vega10_ps == NULL)
+               return -EINVAL;
+
        PP_ASSERT_WITH_CODE(!vega10_trim_dpm_states(hwmgr, vega10_ps),
                        "Attempt to Trim DPM States Failed!",
                        return -1);
@@ -4998,6 +5005,8 @@ static int vega10_check_states_equal(struct pp_hwmgr *hwmgr,
 
        vega10_psa = cast_const_phw_vega10_power_state(pstate1);
        vega10_psb = cast_const_phw_vega10_power_state(pstate2);
+       if (vega10_psa == NULL || vega10_psb == NULL)
+               return -EINVAL;
 
        /* If the two states don't even have the same number of performance levels
         * they cannot be the same state.
@@ -5131,6 +5140,8 @@ static int vega10_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value)
                return -EINVAL;
 
        vega10_ps = cast_phw_vega10_power_state(&ps->hardware);
+       if (vega10_ps == NULL)
+               return -EINVAL;
 
        vega10_ps->performance_levels
        [vega10_ps->performance_level_count - 1].gfx_clock =
@@ -5182,6 +5193,8 @@ static int vega10_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value)
                return -EINVAL;
 
        vega10_ps = cast_phw_vega10_power_state(&ps->hardware);
+       if (vega10_ps == NULL)
+               return -EINVAL;
 
        vega10_ps->performance_levels
        [vega10_ps->performance_level_count - 1].mem_clock =
@@ -5423,6 +5436,9 @@ static void vega10_odn_update_power_state(struct pp_hwmgr *hwmgr)
                return;
 
        vega10_ps = cast_phw_vega10_power_state(&ps->hardware);
+       if (vega10_ps == NULL)
+               return;
+
        max_level = vega10_ps->performance_level_count - 1;
 
        if (vega10_ps->performance_levels[max_level].gfx_clock !=
@@ -5445,6 +5461,9 @@ static void vega10_odn_update_power_state(struct pp_hwmgr *hwmgr)
 
        ps = (struct pp_power_state *)((unsigned long)(hwmgr->ps) + hwmgr->ps_size * (hwmgr->num_ps - 1));
        vega10_ps = cast_phw_vega10_power_state(&ps->hardware);
+       if (vega10_ps == NULL)
+               return;
+
        max_level = vega10_ps->performance_level_count - 1;
 
        if (vega10_ps->performance_levels[max_level].gfx_clock !=
@@ -5635,6 +5654,8 @@ static int vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_
                return -EINVAL;
 
        vega10_ps = cast_const_phw_vega10_power_state(state);
+       if (vega10_ps == NULL)
+               return -EINVAL;
 
        i = index > vega10_ps->performance_level_count - 1 ?
                        vega10_ps->performance_level_count - 1 : index;