[IA64] override for pgd_addr_end to step around holes

Every user region has a hole in the middle where we don't have
enough bits in pgd+pmd+pte so pgd_addr_end needs some extra math
to compute the virtual address base of the next pgd entry.

Thanks to Dave Miller for pointing me in the right direction.

Signed-off-by: Tony Luck <tony.luck@intel.com>

diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 2ef449bc5b950ad277b11265ec8b7f197c3d5dcd..6979242822726a3038ae6875b1a9219b6f8ce4cb 100644 (file)
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -550,6 +550,23 @@ do {                                                                                       \
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 #define __HAVE_ARCH_PTE_SAME
 #define __HAVE_ARCH_PGD_OFFSET_GATE
+
+/*
+ * Override for pgd_addr_end() to deal with the virtual address space holes
+ * in each region.  Virtual address bits are used like this:
+ *      +--------+------+--------+-----+-----+--------+
+ *      | pgdhi3 | rsvd | pgdlow | pmd | pte | offset |
+ *      +--------+------+--------+-----+-----+--------+
+ *  The high bit of 'pgdlow' must be sign extended across the 'rsvd' bits.
+ */
+#define IA64_PGD_SIGNEXTEND (PGDIR_SIZE << (PAGE_SHIFT-7))
+#define pgd_addr_end(addr, end)                                                \
+({     unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK;  \
+       if (__boundary & IA64_PGD_SIGNEXTEND)                           \
+               __boundary |= (RGN_SIZE - 1) & ~(IA64_PGD_SIGNEXTEND-1);\
+       (__boundary - 1 < (end) - 1)? __boundary: (end);                \
+})
+
 #include <asm-generic/pgtable-nopud.h>
 #include <asm-generic/pgtable.h>