ppc64: get rid of cacheable_memzero

diff --git a/arch/ppc64/kernel/htab.c b/arch/ppc64/kernel/htab.c
index 6230349d5e9c0ce6016c8f2feb5b164149084c93..06398b8d04b1139bc4cfe4ee23d0ed09d6060d1b 100644 (file)
--- a/arch/ppc64/kernel/htab.c
+++ b/arch/ppc64/kernel/htab.c
@@ -130,7 +130,7 @@ htab_initialize(void)
                RELOC(_SDR1) = table + __ilog2(pteg_count) - 11;
 
                /* Initialize the HPT with no entries */
-               cacheable_memzero((void *)table, htab_size_bytes);
+               memset((void *)table, 0, htab_size_bytes);
        } else {
                _htab_data->htab = NULL;
                RELOC(_SDR1) = 0; 

diff --git a/arch/ppc64/lib/string.S b/arch/ppc64/lib/string.S
index 748549b2e9c38086ae97d0fbf215f993b6f3515e..2c1b87d244d961676370a82482a8f29057cfc024 100644 (file)
--- a/arch/ppc64/lib/string.S
+++ b/arch/ppc64/lib/string.S
@@ -120,54 +120,6 @@ _GLOBAL(strlen)
        subf    r3,r3,r4
        blr
 
-/*
- * Use dcbz on the complete cache lines in the destination
- * to set them to zero.  This requires that the destination
- * area is cacheable.  -- paulus
- */
-_GLOBAL(cacheable_memzero)
-       mr      r5,r4
-       li      r4,0
-       addi    r6,r3,-4
-       cmplwi  0,r5,4
-       blt     7f
-       stwu    r4,4(r6)
-       beqlr
-       andi.   r0,r6,3
-       add     r5,r0,r5
-       subf    r6,r0,r6
-       clrlwi  r7,r6,32-LG_CACHELINE_BYTES
-       add     r8,r7,r5
-       srwi    r9,r8,LG_CACHELINE_BYTES
-       addic.  r9,r9,-1        /* total number of complete cachelines */
-       ble     2f
-       xori    r0,r7,CACHELINE_MASK & ~3
-       srwi.   r0,r0,2
-       beq     3f
-       mtctr   r0
-4:     stwu    r4,4(r6)
-       bdnz    4b
-3:     mtctr   r9
-       li      r7,4
-10:    dcbz    r7,r6
-       addi    r6,r6,CACHELINE_BYTES
-       bdnz    10b
-       clrlwi  r5,r8,32-LG_CACHELINE_BYTES
-       addi    r5,r5,4
-2:     srwi    r0,r5,2
-       mtctr   r0
-       bdz     6f
-1:     stwu    r4,4(r6)
-       bdnz    1b
-6:     andi.   r5,r5,3
-7:     cmpwi   0,r5,0
-       beqlr
-       mtctr   r5
-       addi    r6,r6,3
-8:     stbu    r4,1(r6)
-       bdnz    8b
-       blr
-
 _GLOBAL(memset)
        rlwimi  r4,r4,8,16,23
        rlwimi  r4,r4,16,0,15

diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 7bced7b6a6347be32a10aa5f098bc737e89356ad..6315ca8f84f0088650447cc7311965be76e9cc81 100644 (file)
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -78,7 +78,6 @@ extern void load_up_altivec(struct task_struct *);
 extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
 extern void cvt_df(double *from, float *to, unsigned long *fpscr);
 extern int abs(int);
-extern void cacheable_memzero(void *p, unsigned int nb);
 
 struct device_node;