]> git.hungrycats.org Git - linux/commitdiff
drm/i915: Fix mismatched INIT power domain disabling during suspend
authorImre Deak <imre.deak@intel.com>
Thu, 13 Oct 2016 11:34:06 +0000 (14:34 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 18 Nov 2016 09:51:53 +0000 (10:51 +0100)
commit fd58753ead86ee289ea89fe26e1842f36e54b36c upstream.

Currently the display INIT power domain disabling/enabling happens in a
mismatched way in the suspend/resume_early hooks respectively. This can
leave display power wells incorrectly disabled in the resume hook if the
suspend sequence is aborted for some reason resulting in the
suspend/resume hooks getting called but the suspend_late/resume_early
hooks being skipped. In particular this change fixes "Unclaimed read
from register 0x1e1204" on BYT/BSW triggered from i915_drm_resume()->
intel_pps_unlock_regs_wa() when suspending with /sys/power/pm_test set
to devices.

Fixes: 85e90679335f ("drm/i915: disable power wells on suspend")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: David Weinehall <david.weinehall@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476358446-11621-1-git-send-email-imre.deak@intel.com
(cherry picked from commit 4c494a5769cd0de92638b25960ba0158c36088a6)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/i915/i915_drv.c

index 5de36d8dcc68fafac7dbeb5aa87d7ef567790203..d46fa2206722855856920de5e6d3817fe75679ab 100644 (file)
@@ -1490,8 +1490,6 @@ static int i915_drm_suspend(struct drm_device *dev)
 
        dev_priv->suspend_count++;
 
-       intel_display_set_init_power(dev_priv, false);
-
        intel_csr_ucode_suspend(dev_priv);
 
 out:
@@ -1508,6 +1506,8 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation)
 
        disable_rpm_wakeref_asserts(dev_priv);
 
+       intel_display_set_init_power(dev_priv, false);
+
        fw_csr = !IS_BROXTON(dev_priv) &&
                suspend_to_idle(dev_priv) && dev_priv->csr.dmc_payload;
        /*