[PATCH] ppc32: fix ebony uart clock

This patch corrects the Ebony board's uart clock value to the rate of the
external Epson SG-615P clock source.  Now good to 115Kbps.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> for CELF
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h
index 749fff956fe6c4b3e311e3591228e639f486be8a..c4352e6bb71af448fa1c9c0cdb5796e72f46691f 100755 (executable)
--- a/arch/ppc/platforms/4xx/ebony.h
+++ b/arch/ppc/platforms/4xx/ebony.h
@@ -64,7 +64,8 @@
 #define UART0_IO_BASE  (u8 *) 0xE0000200
 #define UART1_IO_BASE  (u8 *) 0xE0000300
 
-#define BASE_BAUD      33000000/3/16
+/* external Epson SG-615P */
+#define BASE_BAUD      691200
 
 #define STD_UART_OP(num)                                       \
        { 0, BASE_BAUD, 0, UART##num##_INT,                     \