}
EXPORT_SYMBOL(dma_alloc_coherent);
+/*
+ * Allocate a writecombining region, in much the same way as
+ * dma_alloc_coherent above.
+ */
+void *
+dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp)
+{
+ if (dev == NULL || *dev->dma_mask != 0xffffffff)
+ gfp |= GFP_DMA;
+
+ return consistent_alloc(gfp, size, handle, PTE_BUFFERABLE);
+}
+EXPORT_SYMBOL(dma_alloc_writecombine);
+
/*
* free a page as defined by the above mapping.
*/
consistent_free(cpu_addr, size, handle);
}
+/**
+ * dma_alloc_writecombine - allocate writecombining memory for DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @size: required memory size
+ * @handle: bus-specific DMA address
+ *
+ * Allocate some uncached, buffered memory for a device for
+ * performing DMA. This function allocates pages, and will
+ * return the CPU-viewed address, and sets @handle to be the
+ * device-viewed address.
+ */
+extern void *
+dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp);
+
+#define dma_free_writecombine(dev,size,cpu_addr,handle) \
+ dma_free_coherent(dev,size,cpu_addr,handle)
+
/**
* dma_map_single - map a single buffer for streaming DMA
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices