# Makefile for the sn io routines.
#
-obj-y += sgi_if.o xswitch.o sgi_io_sim.o cdl.o \
+obj-y += xswitch.o sgi_io_sim.o cdl.o \
io.o machvec/ drivers/ platform_init/ sn2/ hwgfs/
#include <linux/types.h>
#include <asm/sn/sgi.h>
#include <asm/io.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
-#include <asm/sn/pci/bridge.h>
+#include <asm/sn/pci/pic.h>
#include "asm/sn/ioerror_handling.h"
#include <asm/sn/xtalk/xbow.h>
/* these get called directly in cdl_add_connpt in fops bypass hack */
-extern int pcibr_attach(vertex_hdl_t);
extern int xbow_attach(vertex_hdl_t);
extern int pic_attach(vertex_hdl_t);
-
/*
* cdl: Connection and Driver List
*
* IO Infrastructure Drivers e.g. pcibr.
*/
-#define MAX_SGI_IO_INFRA_DRVR 7
+#define MAX_SGI_IO_INFRA_DRVR 5
static struct cdl sgi_infrastructure_drivers[MAX_SGI_IO_INFRA_DRVR] =
{
- { XBRIDGE_WIDGET_PART_NUM, XBRIDGE_WIDGET_MFGR_NUM, pcibr_attach /* &pcibr_fops */},
- { BRIDGE_WIDGET_PART_NUM, BRIDGE_WIDGET_MFGR_NUM, pcibr_attach /* &pcibr_fops */},
- { PIC_WIDGET_PART_NUM_BUS0, PIC_WIDGET_MFGR_NUM, pic_attach /* &pic_fops */},
- { PIC_WIDGET_PART_NUM_BUS1, PIC_WIDGET_MFGR_NUM, pic_attach /* &pic_fops */},
+ { PIC_WIDGET_PART_NUM_BUS0, PIC_WIDGET_MFGR_NUM, pic_attach /* &pcibr_fops */},
+ { PIC_WIDGET_PART_NUM_BUS1, PIC_WIDGET_MFGR_NUM, pic_attach /* &pcibr_fops */},
{ XXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
{ XBOW_WIDGET_PART_NUM, XBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
{ PXBOW_WIDGET_PART_NUM, XXBOW_WIDGET_MFGR_NUM, xbow_attach /* &xbow_fops */},
#include <asm/sn/sgi.h>
#include <asm/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sn_sal.h>
#include <linux/smp_lock.h>
#include <asm/sn/sgi.h>
#include <asm/sn/hwgfs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/io.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/intr.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/pci/pciio.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/intr.h>
#include <asm/io.h>
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/pci/pcibr.h>
#include <asm/sn/pci/pcibr_private.h>
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-
-#include <linux/types.h>
-#include <linux/ctype.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/invent.h>
-#include <asm/sn/hcl.h>
-#include <asm/sn/labelcl.h>
-#include <asm/sn/pci/bridge.h>
-#include <asm/sn/ioerror_handling.h>
-#include <asm/sn/pci/pciio.h>
-#include <asm/sn/slotnum.h>
-
-void *
-snia_kmem_zalloc(size_t size, int flag)
-{
- void *ptr = kmalloc(size, GFP_KERNEL);
- if ( ptr )
- BZERO(ptr, size);
- return(ptr);
-}
-
-void
-snia_kmem_free(void *ptr, size_t size)
-{
- kfree(ptr);
-}
-
-/*
- * the alloc/free_node routines do a simple kmalloc for now ..
- */
-void *
-snia_kmem_alloc_node(register size_t size, register int flags, cnodeid_t node)
-{
- /* someday will Allocate on node 'node' */
- return(kmalloc(size, GFP_KERNEL));
-}
-
-void *
-snia_kmem_zalloc_node(register size_t size, register int flags, cnodeid_t node)
-{
- void *ptr = kmalloc(size, GFP_KERNEL);
- if ( ptr )
- BZERO(ptr, size);
- return(ptr);
-}
-
-
-/*
- * print_register() allows formatted printing of bit fields. individual
- * bit fields are described by a struct reg_desc, multiple bit fields within
- * a single word can be described by multiple reg_desc structures.
- * %r outputs a string of the format "<bit field descriptions>"
- * %R outputs a string of the format "0x%x<bit field descriptions>"
- *
- * The fields in a reg_desc are:
- * unsigned long long rd_mask; An appropriate mask to isolate the bit field
- * within a word, and'ed with val
- *
- * int rd_shift; A shift amount to be done to the isolated
- * bit field. done before printing the isolate
- * bit field with rd_format and before searching
- * for symbolic value names in rd_values
- *
- * char *rd_name; If non-null, a bit field name to label any
- * out from rd_format or searching rd_values.
- * if neither rd_format or rd_values is non-null
- * rd_name is printed only if the isolated
- * bit field is non-null.
- *
- * char *rd_format; If non-null, the shifted bit field value
- * is printed using this format.
- *
- * struct reg_values *rd_values; If non-null, a pointer to a table
- * matching numeric values with symbolic names.
- * rd_values are searched and the symbolic
- * value is printed if a match is found, if no
- * match is found "???" is printed.
- *
- */
-
-void
-print_register(unsigned long long reg, struct reg_desc *addr)
-{
- register struct reg_desc *rd;
- register struct reg_values *rv;
- unsigned long long field;
- int any;
-
- printk("<");
- any = 0;
- for (rd = addr; rd->rd_mask; rd++) {
- field = reg & rd->rd_mask;
- field = (rd->rd_shift > 0) ? field << rd->rd_shift : field >> -rd->rd_shift;
- if (any && (rd->rd_format || rd->rd_values || (rd->rd_name && field)))
- printk(",");
- if (rd->rd_name) {
- if (rd->rd_format || rd->rd_values || field) {
- printk("%s", rd->rd_name);
- any = 1;
- }
- if (rd->rd_format || rd->rd_values) {
- printk("=");
- any = 1;
- }
- }
- /* You can have any format so long as it is %x */
- if (rd->rd_format) {
- printk("%llx", field);
- any = 1;
- if (rd->rd_values)
- printk(":");
- }
- if (rd->rd_values) {
- any = 1;
- for (rv = rd->rd_values; rv->rv_name; rv++) {
- if (field == rv->rv_value) {
- printk("%s", rv->rv_name);
- break;
- }
- }
- if (rv->rv_name == NULL)
- printk("???");
- }
- }
- printk(">\n");
-}
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/types.h>
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/io.h>
#include <asm/sn/io.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/kldir.h>
void mark_cpuvertex_as_cpu(vertex_hdl_t vhdl, cpuid_t cpuid);
-/*
- * Support for verbose inventory via hardware graph.
- * klhwg_invent_alloc allocates the necessary size of inventory information
- * and fills in the generic information.
- */
-invent_generic_t *
-klhwg_invent_alloc(cnodeid_t cnode, int class, int size)
-{
- invent_generic_t *invent;
-
- invent = kern_malloc(size);
- if (!invent) return NULL;
-
- invent->ig_module = NODE_MODULEID(cnode);
- invent->ig_slot = SLOTNUM_GETSLOT(NODE_SLOTID(cnode));
- invent->ig_invclass = class;
-
- return invent;
-}
-
-/*
- * Add detailed disabled cpu inventory info to the hardware graph.
- */
-void
-klhwg_disabled_cpu_invent_info(vertex_hdl_t cpuv,
- cnodeid_t cnode,
- klcpu_t *cpu, slotid_t slot)
-{
- invent_cpuinfo_t *cpu_invent;
- diag_inv_t *diag_invent;
-
- cpu_invent = (invent_cpuinfo_t *)
- klhwg_invent_alloc(cnode, INV_PROCESSOR, sizeof(invent_cpuinfo_t));
- if (!cpu_invent)
- return;
-
- /* Diag information on this processor */
- diag_invent = (diag_inv_t *)
- klhwg_invent_alloc(cnode, INV_CPUDIAGVAL, sizeof(diag_inv_t));
-
- if (!diag_invent)
- return;
-
-
- /* Disabled CPU */
- cpu_invent->ic_gen.ig_flag = 0x0;
- cpu_invent->ic_gen.ig_slot = slot;
- cpu_invent->ic_cpu_info.cpuflavor = cpu->cpu_prid;
- cpu_invent->ic_cpu_info.cpufq = cpu->cpu_speed;
- cpu_invent->ic_cpu_info.sdfreq = cpu->cpu_scachespeed;
-
- cpu_invent->ic_cpu_info.sdsize = cpu->cpu_scachesz;
- cpu_invent->ic_cpuid = cpu->cpu_info.virtid;
- cpu_invent->ic_slice = cpu->cpu_info.physid;
-
- /* Disabled CPU label */
- hwgraph_info_add_LBL(cpuv, INFO_LBL_DETAIL_INVENT,
- (arbitrary_info_t) cpu_invent);
- hwgraph_info_export_LBL(cpuv, INFO_LBL_DETAIL_INVENT,
- sizeof(invent_cpuinfo_t));
-
- /* Diagval label - stores reason for disable +{virt,phys}id +diagval*/
- hwgraph_info_add_LBL(cpuv, INFO_LBL_DIAGVAL,
- (arbitrary_info_t) diag_invent);
-
- hwgraph_info_export_LBL(cpuv, INFO_LBL_DIAGVAL,
- sizeof(diag_inv_t));
-}
-
-/*
- * Add detailed cpu inventory info to the hardware graph.
- */
-void
-klhwg_cpu_invent_info(vertex_hdl_t cpuv,
- cnodeid_t cnode,
- klcpu_t *cpu)
-{
- invent_cpuinfo_t *cpu_invent;
-
- cpu_invent = (invent_cpuinfo_t *)
- klhwg_invent_alloc(cnode, INV_PROCESSOR, sizeof(invent_cpuinfo_t));
- if (!cpu_invent)
- return;
-
- if (KLCONFIG_INFO_ENABLED((klinfo_t *)cpu))
- cpu_invent->ic_gen.ig_flag = INVENT_ENABLED;
- else
- cpu_invent->ic_gen.ig_flag = 0x0;
-
- cpu_invent->ic_cpu_info.cpuflavor = cpu->cpu_prid;
- cpu_invent->ic_cpu_info.cpufq = cpu->cpu_speed;
- cpu_invent->ic_cpu_info.sdfreq = cpu->cpu_scachespeed;
-
- cpu_invent->ic_cpu_info.sdsize = cpu->cpu_scachesz;
- cpu_invent->ic_cpuid = cpu->cpu_info.virtid;
- cpu_invent->ic_slice = cpu_physical_id_to_slice(cpu->cpu_info.virtid);
-
- hwgraph_info_add_LBL(cpuv, INFO_LBL_DETAIL_INVENT,
- (arbitrary_info_t) cpu_invent);
- hwgraph_info_export_LBL(cpuv, INFO_LBL_DETAIL_INVENT,
- sizeof(invent_cpuinfo_t));
-}
-
-/*
- * Add information about the baseio prom version number
- * as a part of detailed inventory info in the hwgraph.
- */
-void
-klhwg_baseio_inventory_add(vertex_hdl_t baseio_vhdl,cnodeid_t cnode)
-{
- invent_miscinfo_t *baseio_inventory;
- unsigned char version = 0,revision = 0;
-
- /* Allocate memory for the "detailed inventory" info
- * for the baseio
- */
- baseio_inventory = (invent_miscinfo_t *)
- klhwg_invent_alloc(cnode, INV_PROM, sizeof(invent_miscinfo_t));
- baseio_inventory->im_type = INV_IO6PROM;
- /* Store the revision info in the inventory */
- baseio_inventory->im_version = version;
- baseio_inventory->im_rev = revision;
- /* Put the inventory info in the hardware graph */
- hwgraph_info_add_LBL(baseio_vhdl, INFO_LBL_DETAIL_INVENT,
- (arbitrary_info_t) baseio_inventory);
- /* Make the information available to the user programs
- * thru hwgfs.
- */
- hwgraph_info_export_LBL(baseio_vhdl, INFO_LBL_DETAIL_INVENT,
- sizeof(invent_miscinfo_t));
-}
-
-/*
- * Add detailed cpu inventory info to the hardware graph.
- */
-void
-klhwg_hub_invent_info(vertex_hdl_t hubv,
- cnodeid_t cnode,
- klhub_t *hub)
-{
- invent_miscinfo_t *hub_invent;
-
- hub_invent = (invent_miscinfo_t *)
- klhwg_invent_alloc(cnode, INV_MISC, sizeof(invent_miscinfo_t));
- if (!hub_invent)
- return;
-
- if (KLCONFIG_INFO_ENABLED((klinfo_t *)hub))
- hub_invent->im_gen.ig_flag = INVENT_ENABLED;
-
- hub_invent->im_type = INV_HUB;
- hub_invent->im_rev = hub->hub_info.revision;
- hub_invent->im_speed = hub->hub_speed;
- hwgraph_info_add_LBL(hubv, INFO_LBL_DETAIL_INVENT,
- (arbitrary_info_t) hub_invent);
- hwgraph_info_export_LBL(hubv, INFO_LBL_DETAIL_INVENT,
- sizeof(invent_miscinfo_t));
-}
-
/* ARGSUSED */
void
klhwg_add_hub(vertex_hdl_t node_vertex, klhub_t *hub, cnodeid_t cnode)
mark_cpuvertex_as_cpu(my_cpu, cpu_id);
device_master_set(my_cpu, node_vertex);
-
- klhwg_disabled_cpu_invent_info(my_cpu, cnode, cpu, slot);
return;
}
}
sprintf(name, "%c", 'a' + cpu->cpu_info.physid);
(void) hwgraph_edge_add(cpu_dir, my_cpu, name);
}
-
- klhwg_cpu_invent_info(my_cpu, cnode, cpu);
}
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sn_private.h>
#include <asm/hw_irq.h>
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/io.h>
#include <asm/sn/io.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/labelcl.h>
{
xswitch_vol_t xvolinfo;
int rc;
- extern void * snia_kmem_zalloc(size_t size, int flag);
- xvolinfo = snia_kmem_zalloc(sizeof(struct xswitch_vol_s), GFP_KERNEL);
- mutex_init(&xvolinfo->xswitch_volunteer_mutex);
- rc = hwgraph_info_add_LBL(xswitch,
- INFO_LBL_XSWITCH_VOL,
+ xvolinfo = kmalloc(sizeof(struct xswitch_vol_s), GFP_KERNEL);
+ if (xvolinfo <= 0 ) {
+ printk("xswitch_vertex_init: out of memory\n");
+ return;
+ }
+ memset(xvolinfo, 0, sizeof(struct xswitch_vol_s));
+ init_MUTEX(&xvolinfo->xswitch_volunteer_mutex);
+ rc = hwgraph_info_add_LBL(xswitch, INFO_LBL_XSWITCH_VOL,
(arbitrary_info_t)xvolinfo);
ASSERT(rc == GRAPH_SUCCESS); rc = rc;
}
rc = hwgraph_info_remove_LBL(xswitch,
INFO_LBL_XSWITCH_VOL,
(arbitrary_info_t *)&xvolinfo);
- snia_kmem_free(xvolinfo, sizeof(struct xswitch_vol_s));
+ if (xvolinfo > 0)
+ kfree(xvolinfo);
}
/*
* A Crosstalk master volunteers to manage xwidgets on the specified xswitch.
#include <asm/sn/sgi.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/io.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xbow.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/klconfig.h>
* passed into us, into its external representation. See comment
* for the PCIBR_DEVICE_TO_SLOT macro for more information.
*/
- NEW(pcibr_info);
+ pcibr_info = kmalloc(sizeof (*(pcibr_info)), GFP_KERNEL);
+ if ( !pcibr_info ) {
+ return NULL;
+ }
+ memset(pcibr_info, 0, sizeof (*(pcibr_info)));
+
pciio_device_info_new(&pcibr_info->f_c, pcibr_soft->bs_vhdl,
PCIBR_DEVICE_TO_SLOT(pcibr_soft, slot),
rfunc, vendor, device);
* allocate soft state structure, fill in some
* fields, and hook it up to our vertex.
*/
- NEW(pcibr_soft);
+ pcibr_soft = kmalloc(sizeof(*(pcibr_soft)), GFP_KERNEL);
if (ret_softp)
*ret_softp = pcibr_soft;
- BZERO(pcibr_soft, sizeof *pcibr_soft);
+ if (!pcibr_soft)
+ return -1;
+
+ memset(pcibr_soft, 0, sizeof *pcibr_soft);
pcibr_soft_set(pcibr_vhdl, pcibr_soft);
pcibr_soft->bs_conn = xconn_vhdl;
pcibr_soft->bs_vhdl = pcibr_vhdl;
{
pcibr_list_p self;
- NEW(self);
+ self = kmalloc(sizeof(*(self)), GFP_KERNEL);
+ if (!self)
+ return -1;
+ memset(self, 0, sizeof(*(self)));
self->bl_soft = pcibr_soft;
self->bl_vhdl = pcibr_vhdl;
self->bl_next = pcibr_list;
/* Clear the software state maintained by the bridge driver for this
* bridge.
*/
- DEL(pcibr_soft);
+ kfree(pcibr_soft);
+
/* Remove the Bridge revision labelled info */
(void)hwgraph_info_remove_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, NULL);
/* Remove the character device associated with this bridge */
mapptr = NULL;
else {
pcibr_unlock(pcibr_soft, s);
- NEW(pcibr_piomap);
+ pcibr_piomap = kmalloc(sizeof (*(pcibr_piomap)), GFP_KERNEL);
+ if ( !pcibr_piomap ) {
+ PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
+ "pcibr_piomap_alloc: malloc fails\n"));
+ return NULL;
+ }
+ memset(pcibr_piomap, 0, sizeof (*(pcibr_piomap)));
}
pcibr_piomap->bp_dev = pconn_vhdl;
if (!start_addr) {
pcibr_unlock(pcibr_soft, s);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
- "pcibr_piospace_alloc: request 0x%x to big\n", req_size));
+ "pcibr_piospace_alloc: request 0x%lx to big\n", req_size));
return 0;
}
- NEW(piosp);
+ piosp = kmalloc(sizeof (*(piosp)), GFP_KERNEL);
+ if ( !piosp ) {
+ PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_PIOMAP, pconn_vhdl,
+ "pcibr_piospace_alloc: malloc fails\n"));
+ return 0;
+ }
+ memset(piosp, 0, sizeof (*(piosp)));
+
piosp->free = 0;
piosp->space = space;
piosp->start = start_addr;
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DMAMAP | PCIBR_DEBUG_DMADIR, pconn_vhdl,
"pcibr_dmamap_alloc: unable to use direct64\n"));
- /* PIC only supports 64-bit direct mapping in PCI-X mode. */
- if (IS_PCIX(pcibr_soft)) {
- DEL(pcibr_dmamap);
+ /* PIC in PCI-X mode only supports 64-bit direct mapping so
+ * don't fall thru and try 32-bit direct mapping or 32-bit
+ * page mapping
+ */
+ if (IS_PIC_SOFT(pcibr_soft) && IS_PCIX(pcibr_soft)) {
+ kfree(pcibr_dmamap);
return 0;
}
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
int pcibr_llp_control_war_cnt; /* PCIBR_LLP_CONTROL_WAR */
-static struct reg_values xio_cmd_pactyp[] =
+/*
+ * register values
+ * map between numeric values and symbolic values
+ */
+struct reg_values {
+ unsigned long long rv_value;
+ char *rv_name;
+};
+
+/*
+ * register descriptors are used for formatted prints of register values
+ * rd_mask and rd_shift must be defined, other entries may be null
+ */
+struct reg_desc {
+ unsigned long long rd_mask; /* mask to extract field */
+ int rd_shift; /* shift for extracted value, - >>, + << */
+ char *rd_name; /* field name */
+ char *rd_format; /* format to print field */
+ struct reg_values *rd_values; /* symbolic names of values */
+};
+
+/* Crosstalk Packet Types */
+static struct reg_values xtalk_cmd_pactyp[] =
{
{0x0, "RdReq"},
{0x1, "RdResp"},
{0}
};
-static struct reg_desc xio_cmd_bits[] =
+static struct reg_desc xtalk_cmd_bits[] =
{
{WIDGET_DIDN, -28, "DIDN", "%x"},
{WIDGET_SIDN, -24, "SIDN", "%x"},
- {WIDGET_PACTYP, -20, "PACTYP", 0, xio_cmd_pactyp},
+ {WIDGET_PACTYP, -20, "PACTYP", 0, xtalk_cmd_pactyp},
{WIDGET_TNUM, -15, "TNUM", "%x"},
{WIDGET_COHERENT, 0, "COHERENT"},
{WIDGET_DS, 0, "DS"},
{0}
};
-static void
-print_bridge_errcmd(uint32_t cmdword, char *errtype)
-{
- printk("\t Bridge %s Error Command Word Register ", errtype);
- print_register(cmdword, xio_cmd_bits);
-}
-
static char *pcibr_isr_errs[] =
{
"", "", "", "", "", "", "", "",
"45: PCI-X split completion message parity error",
};
+/*
+ * print_register() allows formatted printing of bit fields. individual
+ * bit fields are described by a struct reg_desc, multiple bit fields within
+ * a single word can be described by multiple reg_desc structures.
+ * %r outputs a string of the format "<bit field descriptions>"
+ * %R outputs a string of the format "0x%x<bit field descriptions>"
+ *
+ * The fields in a reg_desc are:
+ * unsigned long long rd_mask; An appropriate mask to isolate the bit field
+ * within a word, and'ed with val
+ *
+ * int rd_shift; A shift amount to be done to the isolated
+ * bit field. done before printing the isolate
+ * bit field with rd_format and before searching
+ * for symbolic value names in rd_values
+ *
+ * char *rd_name; If non-null, a bit field name to label any
+ * out from rd_format or searching rd_values.
+ * if neither rd_format or rd_values is non-null
+ * rd_name is printed only if the isolated
+ * bit field is non-null.
+ *
+ * char *rd_format; If non-null, the shifted bit field value
+ * is printed using this format.
+ *
+ * struct reg_values *rd_values; If non-null, a pointer to a table
+ * matching numeric values with symbolic names.
+ * rd_values are searched and the symbolic
+ * value is printed if a match is found, if no
+ * match is found "???" is printed.
+ *
+ */
+
+static void
+print_register(unsigned long long reg, struct reg_desc *addr)
+{
+ register struct reg_desc *rd;
+ register struct reg_values *rv;
+ unsigned long long field;
+ int any;
+
+ printk("<");
+ any = 0;
+ for (rd = addr; rd->rd_mask; rd++) {
+ field = reg & rd->rd_mask;
+ field = (rd->rd_shift > 0) ? field << rd->rd_shift : field >> -rd->rd_shift;
+ if (any && (rd->rd_format || rd->rd_values || (rd->rd_name && field)))
+ printk(",");
+ if (rd->rd_name) {
+ if (rd->rd_format || rd->rd_values || field) {
+ printk("%s", rd->rd_name);
+ any = 1;
+ }
+ if (rd->rd_format || rd->rd_values) {
+ printk("=");
+ any = 1;
+ }
+ }
+ /* You can have any format so long as it is %x */
+ if (rd->rd_format) {
+ printk("%llx", field);
+ any = 1;
+ if (rd->rd_values)
+ printk(":");
+ }
+ if (rd->rd_values) {
+ any = 1;
+ for (rv = rd->rd_values; rv->rv_name; rv++) {
+ if (field == rv->rv_value) {
+ printk("%s", rv->rv_name);
+ break;
+ }
+ }
+ if (rv->rv_name == NULL)
+ printk("???");
+ }
+ }
+ printk(">\n");
+}
+
#define BEM_ADD_STR(s) printk("%s", (s))
#define BEM_ADD_VAR(v) printk("\t%20s: 0x%llx\n", #v, ((unsigned long long)v))
#define BEM_ADD_REG(r) printk("\t%20s: ", #r); print_register((r), r ## _desc)
#define BEM_ADD_NSPC(n,s) printk("\t%20s: ", n); print_register(s, space_desc)
#define BEM_ADD_SPC(s) BEM_ADD_NSPC(#s, s)
+
/*
* display memory directory state
*/
#endif
}
+static void
+print_bridge_errcmd(uint32_t cmdword, char *errtype)
+{
+ printk("\t Bridge %s Error Command Word Register ", errtype);
+ print_register(cmdword, xtalk_cmd_bits);
+}
+
/*
* Dump relevant error information for Bridge error interrupts.
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
if (alloc && (rv != GRAPH_SUCCESS)) {
- NEW(hint);
+ hint = kmalloc(sizeof (*(hint)), GFP_KERNEL);
+ if ( !hint )
+ goto abnormal_exit;
+ memset(hint, 0, sizeof (*(hint)));
+
hint->rrb_alloc_funct = NULL;
hint->ph_intr_bits = NULL;
rv = hwgraph_info_add_LBL(xconn_vhdl,
return (pcibr_hints_t) ainfo;
abnormal_exit:
-#ifdef LATER
- printf("SHOULD NOT BE HERE\n");
-#endif
- DEL(hint);
+ kfree(hint);
return(NULL);
}
if (ainfo == 0) {
uint64_t *subdevp;
- NEW(subdevp);
+ subdevp = kmalloc(sizeof (*(subdevp)), GFP_KERNEL);
if (!subdevp) {
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
"pcibr_hints_subdevs: subdev ptr alloc failed\n"));
return;
}
+ memset(subdevp, 0, sizeof (*(subdevp)));
*subdevp = subdevs;
hwgraph_info_add_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, (arbitrary_info_t) subdevp);
hwgraph_info_get_LBL(pconn_vhdl, INFO_LBL_SUBDEVS, &ainfo);
if (ainfo == (arbitrary_info_t) subdevp)
return;
- DEL(subdevp);
+ kfree(subdevp);
if (ainfo == (arbitrary_info_t) NULL) {
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_HINTS, xconn_vhdl,
"pcibr_hints_subdevs: null subdevs ptr\n"));
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
inline int
compare_and_swap_ptr(void **location, void *old_ptr, void *new_ptr)
{
- FIXME("compare_and_swap_ptr : NOT ATOMIC");
+ /* FIXME - compare_and_swap_ptr NOT ATOMIC */
if (*location == old_ptr) {
*location = new_ptr;
return(1);
if (flush_nasid_list[nasid].widget_p[wid_num] == NULL) return;
p = &flush_nasid_list[nasid].widget_p[wid_num][0];
- // find a matching BAR
+ /* find a matching BAR */
for (i=0; i<DEV_PER_WIDGET;i++) {
for (j=0; j<PCI_ROM_RESOURCE;j++) {
p++;
}
- // if no matching BAR, return without doing anything.
+ /* if no matching BAR, return without doing anything. */
if (i == DEV_PER_WIDGET) return;
p->flush_addr = 0;
- // force an interrupt.
+ /* force an interrupt. */
*(bridgereg_t *)(p->force_int_addr) = 1;
- // wait for the interrupt to come back.
+ /* wait for the interrupt to come back. */
while (p->flush_addr != 0x10f);
- // okay, everything is synched up.
+ /* okay, everything is synched up. */
spin_unlock_irqrestore(&p->flush_lock, flags);
return;
lines & 4 ? " INTC" : "",
lines & 8 ? " INTD" : ""));
- NEW(pcibr_intr);
+ pcibr_intr = kmalloc(sizeof (*(pcibr_intr)), GFP_KERNEL);
if (!pcibr_intr)
return NULL;
+ memset(pcibr_intr, 0, sizeof (*(pcibr_intr)));
pcibr_intr->bi_dev = pconn_vhdl;
pcibr_intr->bi_lines = lines;
* in xtalk_intr_p.
*/
if (!*xtalk_intr_p) {
-#ifdef SUPPORT_PRINTING_V_FORMAT
- printk(KERN_ALERT
- "pcibr_intr_alloc %v: unable to get xtalk interrupt resources",
- xconn_vhdl);
-#else
- printk(KERN_ALERT
- "pcibr_intr_alloc 0x%p: unable to get xtalk interrupt resources",
- (void *)xconn_vhdl);
-#endif
+ printk(KERN_ALERT "pcibr_intr_alloc %s: "
+ "unable to get xtalk interrupt resources",
+ pcibr_soft->bs_name);
/* yes, we leak resources here. */
return 0;
}
pcibr_intr->bi_ibits |= 1 << pcibr_int_bit;
- NEW(intr_entry);
+ intr_entry = kmalloc(sizeof (*(intr_entry)), GFP_KERNEL);
+ if ( !intr_entry ) {
+ printk(KERN_ALERT "pcibr_intr_alloc %s: "
+ "unable to get memory",
+ pcibr_soft->bs_name);
+ return 0;
+ }
+ memset(intr_entry, 0, sizeof (*(intr_entry)));
+
intr_entry->il_next = NULL;
intr_entry->il_intr = pcibr_intr;
intr_entry->il_wrbf = &(bridge->b_wr_req_buf[pciio_slot].reg);
* and we replaced it, so we
* don't need our intr_entry.
*/
- DEL(intr_entry);
+ kfree(intr_entry);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
"INT 0x%x (bridge bit %d) replaces erased first\n",
pcibr_int_bits, pcibr_int_bit));
* and we replaced it, so we
* don't need our intr_entry.
*/
- DEL(intr_entry);
+ kfree(intr_entry);
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_INTR_ALLOC, pconn_vhdl,
"INT 0x%x (bridge bit %d) replaces erase Nth\n",
}
}
-#if DEBUG && INTR_DEBUG
- printk("%v pcibr_intr_alloc complete\n", pconn_vhdl);
-#endif
hub_intr = (hub_intr_t)xtalk_intr;
pcibr_intr->bi_irq = hub_intr->i_bit;
pcibr_intr->bi_cpu = hub_intr->i_cpuid;
}
}
}
- DEL(pcibr_intr);
+ kfree(pcibr_intr);
}
void
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
reg_p b_respp;
pcibr_slot_info_resp_t slotp;
pcibr_slot_func_info_resp_t funcp;
- extern void snia_kmem_free(void *, int);
- slotp = snia_kmem_zalloc(sizeof(*slotp), 0);
+ slotp = kmalloc(sizeof(*slotp), GFP_KERNEL);
if (slotp == NULL) {
return(ENOMEM);
}
return(EFAULT);
}
- snia_kmem_free(slotp, sizeof(*slotp));
+ kfree(slotp);
return(0);
}
}
cfgw = pcibr_slot_config_addr(bridge, slot, 0);
}
- NEWA(pcibr_infoh, nfunc);
+ pcibr_infoh = kmalloc(nfunc*sizeof (*(pcibr_infoh)), GFP_KERNEL);
+ if ( !pcibr_infoh ) {
+ return ENOMEM;
+ }
+ memset(pcibr_infoh, 0, nfunc*sizeof (*(pcibr_infoh)));
pcibr_soft->bs_slot[slot].bss_ninfo = nfunc;
pcibr_soft->bs_slot[slot].bss_infos = pcibr_infoh;
pcibr_device_info_free(pcibr_vhdl, slot);
pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
- DELA(pcibr_infoh,nfunc);
+ kfree(pcibr_infoh);
pcibr_soft->bs_slot[slot].bss_ninfo = 0;
return(0);
* build verticies for them).
*/
if (pcibr_soft->bs_slot[slot].bss_ninfo < 1) {
- NEWA(pcibr_infoh, 1);
+ pcibr_infoh = kmalloc(sizeof (*(pcibr_infoh)), GFP_KERNEL);
+ if ( !pcibr_infoh ) {
+ return ENOMEM;
+ }
+ memset(pcibr_infoh, 0, sizeof (*(pcibr_infoh)));
+
pcibr_soft->bs_slot[slot].bss_ninfo = 1;
pcibr_soft->bs_slot[slot].bss_infos = pcibr_infoh;
pciio_device_info_unregister(pcibr_vhdl, &pcibr_info->f_c);
pciio_device_info_free(&pcibr_info->f_c);
- DEL(pcibr_info);
+ kfree(pcibr_info);
}
/* Reset the mapping usage counters */
#include <asm/sn/sgi.h>
#include <asm/sn/xtalk/xbow.h> /* Must be before iograph.h to get MAX_PORT_NUM */
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/labelcl.h>
pciio_vendor_id_t vendor_id,
pciio_device_id_t device_id)
{
- if (!pciio_info)
- NEW(pciio_info);
+ if (!pciio_info) {
+ pciio_info = kmalloc(sizeof (*(pciio_info)), GFP_KERNEL);
+ if ( pciio_info )
+ memset(pciio_info, 0, sizeof (*(pciio_info)));
+ }
ASSERT(pciio_info != NULL);
pciio_info->c_slot = slot;
/* NOTE : pciio_info is a structure within the pcibr_info
* and not a pointer to memory allocated on the heap !!
*/
- BZERO((char *)pciio_info,sizeof(pciio_info));
+ memset((char *)pciio_info, 0, sizeof(pciio_info));
}
vertex_hdl_t
/*
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xwidget.h>
extern void pcibr_driver_unreg_callback(vertex_hdl_t, int, int, int);
-/*
- * copy inventory_t from conn_v to peer_conn_v
- */
-int
-pic_bus1_inventory_dup(vertex_hdl_t conn_v, vertex_hdl_t peer_conn_v)
-{
- inventory_t *pinv, *peer_pinv;
-
- if (hwgraph_info_get_LBL(conn_v, INFO_LBL_INVENT,
- (arbitrary_info_t *)&pinv) == GRAPH_SUCCESS)
- {
- NEW(peer_pinv);
- memcpy(peer_pinv, pinv, sizeof(inventory_t));
- if (hwgraph_info_add_LBL(peer_conn_v, INFO_LBL_INVENT,
- (arbitrary_info_t)peer_pinv) != GRAPH_SUCCESS) {
- DEL(peer_pinv);
- return 0;
- }
- return 1;
- }
-
- printk("pic_bus1_inventory_dup: cannot get INFO_LBL_INVENT from 0x%lx\n ", (uint64_t)conn_v);
- return 0;
-}
-
/*
* copy xwidget_info_t from conn_v to peer_conn_v
*/
if (hwgraph_info_get_LBL(conn_v, INFO_LBL_XWIDGET,
(arbitrary_info_t *)&widget_info) == GRAPH_SUCCESS) {
- NEW(peer_widget_info);
- peer_widget_info->w_vertex = peer_conn_v;
- peer_widget_info->w_id = widget_info->w_id;
- peer_widget_info->w_master = peer_hubv;
- peer_widget_info->w_masterid = peer_hub_info->h_widgetid;
+ peer_widget_info = kmalloc(sizeof (*(peer_widget_info)), GFP_KERNEL);
+ if ( !peer_widget_info ) {
+ return 0;
+ }
+ memset(peer_widget_info, 0, sizeof (*(peer_widget_info)));
+
+ peer_widget_info->w_fingerprint = widget_info_fingerprint;
+ peer_widget_info->w_vertex = peer_conn_v;
+ peer_widget_info->w_id = widget_info->w_id;
+ peer_widget_info->w_master = peer_hubv;
+ peer_widget_info->w_masterid = peer_hub_info->h_widgetid;
/* structure copy */
- peer_widget_info->w_hwid = widget_info->w_hwid;
- peer_widget_info->w_efunc = 0;
- peer_widget_info->w_einfo = 0;
+ peer_widget_info->w_hwid = widget_info->w_hwid;
+ peer_widget_info->w_efunc = 0;
+ peer_widget_info->w_einfo = 0;
peer_widget_info->w_name = kmalloc(strlen(peer_path) + 1, GFP_KERNEL);
strcpy(peer_widget_info->w_name, peer_path);
if (hwgraph_info_add_LBL(peer_conn_v, INFO_LBL_XWIDGET,
(arbitrary_info_t)peer_widget_info) != GRAPH_SUCCESS) {
- DEL(peer_widget_info);
+ kfree(peer_widget_info);
return 0;
}
* vertex but that should be safe and we don't
* really expect the additions to fail anyway.
*/
-#if 0
- if (!pic_bus1_inventory_dup(conn_v, peer_conn_v))
- return 0;
- pic_bus1_device_desc_dup(conn_v, peer_conn_v);
-#endif
if (!pic_bus1_widget_info_dup(conn_v, peer_conn_v, xbow_peer))
return 0;
#include <asm/system.h>
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/io.h>
#include <asm/sn/io.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/intr.h>
xtalk_addr = SH_II_INT0 | ((unsigned long)nasid << 36) | (1UL << 47);
}
- intr_hdl = snia_kmem_alloc_node(sizeof(struct hub_intr_s), KM_NOSLEEP, cnode);
+ intr_hdl = kmalloc(sizeof(struct hub_intr_s), GFP_KERNEL);
ASSERT_ALWAYS(intr_hdl);
+ memset(intr_hdl, 0, sizeof(struct hub_intr_s));
xtalk_info = &intr_hdl->i_xtalk_info;
xtalk_info->xi_dev = dev;
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/sn2/sn_private.h>
#include <asm/sn/sn2/shubio.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/pci/bridge.h>
#include <asm/sn/driver.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/sgi.h>
#include <asm/sn/driver.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/labelcl.h>
#include <asm/sn/xtalk/xtalk.h>
#include <asm/pgtable.h>
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/types.h>
#include <asm/sn/pci/bridge.h>
#define _ASM_IA64_SN_HCL_H
#include <asm/sn/sgi.h>
-#include <asm/sn/invent.h>
extern vertex_hdl_t hwgraph_root;
extern vertex_hdl_t linux_busnum;
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
- */
-#ifndef _ASM_IA64_SN_INVENT_H
-#define _ASM_IA64_SN_INVENT_H
-
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-/*
- * sys/sn/invent.h -- Kernel Hardware Inventory
- *
- * As the system boots, a list of recognized devices is assembled.
- * This list can then be accessed through syssgi() by user-level programs
- * so that they can learn about available peripherals and the system's
- * hardware configuration.
- *
- * The data is organized into a linked list of structures that are composed
- * of an inventory item class and a class-specific type. Each instance may
- * also specify a 32-bit "state" which might be size, readiness, or
- * anything else that's relevant.
- *
- */
-
-#define major_t int
-#define minor_t int
-#define app32_ptr_t unsigned long
-#define graph_vertex_place_t long
-#define GRAPH_VERTEX_NONE ((vertex_hdl_t)-1)
-#define GRAPH_EDGE_PLACE_NONE ((graph_edge_place_t)0)
-#define GRAPH_INFO_PLACE_NONE ((graph_info_place_t)0)
-#define GRAPH_VERTEX_PLACE_NONE ((graph_vertex_place_t)0)
-
-
-typedef struct inventory_s {
- struct inventory_s *inv_next; /* next inventory record in list */
- int inv_class; /* class of object */
- int inv_type; /* class sub-type of object */
- major_t inv_controller; /* object major identifier */
- minor_t inv_unit; /* object minor identifier */
- int inv_state; /* information specific to object or
- class */
-} inventory_t;
-
-typedef struct cpu_inv_s {
- int cpuflavor; /* differentiate processor */
- int cpufq; /* cpu frequency */
- int sdsize; /* secondary data cache size */
- int sdfreq; /* speed of the secondary cache */
-} cpu_inv_t;
-
-
-typedef struct diag_inv_s{
- char name[80];
- int diagval;
- int physid;
- int virtid;
-} diag_inv_t;
-
-
-typedef struct router_inv_s{
- char portmap[80]; /* String indicating which ports int/ext */
- char type[40]; /* String name: e.g. "star", "meta", etc. */
- int freq; /* From hub */
- int rev; /* From hub */
-} router_inv_t;
-
-
-/*
- * NOTE: This file is a central registry for inventory IDs for each
- * class of inventory object. It is important to keep the central copy
- * of this file up-to-date with the work going on in various engineering
- * projects. When making changes to this file in an engineering project
- * tree, please make those changes separately from any others and then
- * merge the changes to this file into the main line trees in order to
- * prevent other engineering projects from conflicting with your ID
- * allocations.
- */
-
-
-/* Inventory Classes */
-/* when adding a new class, add also to classes[] in hinv.c */
-#define INV_PROCESSOR 1
-#define INV_DISK 2
-#define INV_MEMORY 3
-#define INV_SERIAL 4
-#define INV_PARALLEL 5
-#define INV_TAPE 6
-#define INV_GRAPHICS 7
-#define INV_NETWORK 8
-#define INV_SCSI 9 /* SCSI devices other than disk and tape */
-#define INV_AUDIO 10
-#define INV_IOBD 11
-#define INV_VIDEO 12
-#define INV_BUS 13
-#define INV_MISC 14 /* miscellaneous: a catchall */
-/*** add post-5.2 classes here for backward compatibility ***/
-#define INV_COMPRESSION 15
-#define INV_VSCSI 16 /* SCSI devices on jag other than disk and tape */
-#define INV_DISPLAY 17
-#define INV_UNC_SCSILUN 18 /* Unconnected SCSI lun */
-#define INV_PCI 19 /* PCI Bus */
-#define INV_PCI_NO_DRV 20 /* PCI Bus without any driver */
-#define INV_PROM 21 /* Different proms in the system */
-#define INV_IEEE1394 22 /* IEEE1394 devices */
-#define INV_RPS 23 /* redundant power source */
-#define INV_TPU 24 /* Tensor Processing Unit */
-#define INV_FCNODE 25 /* Helper class for SCSI classes, not in classes[] */
-#define INV_USB 26 /* Universal Serial Bus */
-#define INV_1394NODE 27 /* helper class for 1394/SPB2 classes, not in classes[] */
-
-/* types for class processor */
-#define INV_CPUBOARD 1
-#define INV_CPUCHIP 2
-#define INV_FPUCHIP 3
-#define INV_CCSYNC 4 /* CC Rev 2+ sync join counter */
-
-/* states for cpu and fpu chips are revision numbers */
-
-/* cpuboard states */
-#define INV_IP20BOARD 10
-#define INV_IP19BOARD 11
-#define INV_IP22BOARD 12
-#define INV_IP21BOARD 13
-#define INV_IP26BOARD 14
-#define INV_IP25BOARD 15
-#define INV_IP30BOARD 16
-#define INV_IP28BOARD 17
-#define INV_IP32BOARD 18
-#define INV_IP27BOARD 19
-#define INV_IPMHSIMBOARD 20
-#define INV_IP33BOARD 21
-#define INV_IP35BOARD 22
-
-/* types for class INV_IOBD */
-#define INV_EVIO 2 /* EVEREST I/O board */
-#define INV_O200IO 3 /* Origin 200 base I/O */
-
-/* IO board types for origin2000 for class INV_IOBD*/
-
-#define INV_O2000BASEIO 0x21
-#define INV_O2000MSCSI 0x22
-#define INV_O2000MENET 0x23
-#define INV_O2000HIPPI 0x24
-#define INV_O2000GFX 0x25
-#define INV_O2000HAROLD 0x26
-#define INV_O2000VME 0x27
-#define INV_O2000MIO 0x28
-#define INV_O2000FC 0x29
-#define INV_O2000LINC 0x2a
-
-#define INV_PCIADAP 4
-/* states for class INV_IOBD type INV_EVERESTIO -- value of eb_type field */
-#define INV_IO4_REV1 0x21
-
-/* types for class disk */
-/* NB: types MUST be unique within a class.
- Please check this if adding new types. */
-
-#define INV_SCSICONTROL 1
-#define INV_SCSIDRIVE 2
-#define INV_SCSIFLOPPY 5 /* also cdroms, optical disks, etc. */
-#define INV_JAGUAR 16 /* Interphase Jaguar */
-#define INV_VSCSIDRIVE 17 /* Disk connected to Jaguar */
-#define INV_GIO_SCSICONTROL 18 /* optional GIO SCSI controller */
-#define INV_SCSIRAID 19 /* SCSI attached RAID */
-#define INV_XLVGEN 20 /* Generic XLV disk device */
-#define INV_PCCARD 21 /* PC-card (PCMCIA) devices */
-#define INV_PCI_SCSICONTROL 22 /* optional PCI SCSI controller */
-
-/* states for INV_SCSICONTROL disk type; indicate which chip rev;
- * for 93A and B, unit field has microcode rev. */
-#define INV_WD93 0 /* WD 33C93 */
-#define INV_WD93A 1 /* WD 33C93A */
-#define INV_WD93B 2 /* WD 33C93B */
-#define INV_WD95A 3 /* WD 33C95A */
-#define INV_SCIP95 4 /* SCIP with a WD 33C95A */
-#define INV_ADP7880 5 /* Adaptec 7880 (single channel) */
-#define INV_QL_REV1 6 /* qlogic 1040 */
-#define INV_QL_REV2 7 /* qlogic 1040A */
-#define INV_QL_REV2_4 8 /* qlogic 1040A rev 4 */
-#define INV_QL_REV3 9 /* qlogic 1040B */
-#define INV_FCADP 10 /* Adaptec Emerald Fibrechannel */
-#define INV_QL_REV4 11 /* qlogic 1040B rev 2 */
-#define INV_QL 12 /* Unknown QL version */
-#define INV_QL_1240 13 /* qlogic 1240 */
-#define INV_QL_1080 14 /* qlogic 1080 */
-#define INV_QL_1280 15 /* qlogic 1280 */
-#define INV_QL_10160 16 /* qlogic 10160 */
-#define INV_QL_12160 17 /* qlogic 12160 */
-#define INV_QL_2100 18 /* qLogic 2100 Fibrechannel */
-#define INV_QL_2200 19 /* qLogic 2200 Fibrechannel */
-#define INV_PR_HIO_D 20 /* Prisa HIO Dual channel */
-#define INV_PR_PCI64_D 21 /* Prisa PCI-64 Dual channel */
-#define INV_QL_2200A 22 /* qLogic 2200A Fibrechannel */
-#define INV_SBP2 23 /* SBP2 protocol over OHCI on 1394 */
-#define INV_QL_2300 24 /* qLogic 2300 Fibrechannel */
-
-
-/* states for INV_SCSIDRIVE type of class disk */
-#define INV_RAID5_LUN 0x100
-#define INV_PRIMARY 0x200 /* primary path */
-#define INV_ALTERNATE 0x400 /* alternate path */
-#define INV_FAILED 0x800 /* path has failed */
-#define INV_XVMVOL 0x1000 /* disk is managed by XVM */
-
-/* states for INV_SCSIFLOPPY type of class disk */
-#define INV_TEAC_FLOPPY 1 /* TEAC 3 1/2 inch floppy drive */
-#define INV_INSITE_FLOPPY 2 /* INSITE, IOMEGA Io20S, SyQuest floppy drives */
-
-/* END OF CLASS DISK TYPES */
-
-/* types for class memory */
-/* NB. the states for class memory are sizes in bytes */
-#define INV_MAIN 1
-#define INV_DCACHE 3
-#define INV_ICACHE 4
-#define INV_WBUFFER 5
-#define INV_SDCACHE 6
-#define INV_SICACHE 7
-#define INV_SIDCACHE 8
-#define INV_MAIN_MB 9
-#define INV_HUBSPC 10 /* HUBSPC */
-#define INV_TIDCACHE 11
-
-/* types for class serial */
-#define INV_CDSIO 1 /* Central Data serial board */
-#define INV_T3270 2 /* T3270 emulation */
-#define INV_GSE 3 /* SpectraGraphics Gerbil coax cable */
-#define INV_SI 4 /* SNA SDLC controller */
-#define INV_M333X25 6 /* X.25 controller */
-#define INV_CDSIO_E 7 /* Central Data serial board on E space */
-#define INV_ONBOARD 8 /* Serial ports per CPU board */
-#define INV_EPC_SERIAL 9 /* EVEREST I/O EPC serial port */
-#define INV_ICA 10 /* IRIS (IBM) Channel Adapter card */
-#define INV_VSC 11 /* SBE VME Synch Comm board */
-#define INV_ISC 12 /* SBE ISA Synch Comm board */
-#define INV_GSC 13 /* SGI GIO Synch Comm board */
-#define INV_ASO_SERIAL 14 /* serial portion of SGI ASO board */
-#define INV_PSC 15 /* SBE PCI Synch Comm board */
-#define INV_IOC3_DMA 16 /* DMA mode IOC3 serial */
-#define INV_IOC3_PIO 17 /* PIO mode IOC3 serial */
-#define INV_INVISIBLE 18 /* invisible inventory entry for kernel use */
-#define INV_ISA_DMA 19 /* DMA mode ISA serial -- O2 */
-
-/* types for class parallel */
-#define INV_GPIB 2 /* National Instrument GPIB board */
-#define INV_GPIB_E 3 /* National Instrument GPIB board on E space*/
-#define INV_EPC_PLP 4 /* EVEREST I/O EPC Parallel Port */
-#define INV_ONBOARD_PLP 5 /* Integral parallel port,
- state = 0 -> output only
- state = 1 -> bi-directional */
-#define INV_EPP_ECP_PLP 6 /* Integral EPP/ECP parallel port */
-#define INV_EPP_PFD 7 /* External EPP parallel peripheral */
-
-/* types for class tape */
-#define INV_SCSIQIC 1 /* Any SCSI tape, not just QIC{24,150}... */
-#define INV_VSCSITAPE 4 /* SCSI tape connected to Jaguar */
-
-/* sub types for type INV_SCSIQIC and INV_VSCSITAPE (in state) */
-#define TPUNKNOWN 0 /* type not known */
-#define TPQIC24 1 /* QIC24 1/4" cartridge */
-#define TPDAT 2 /* 4mm Digital Audio Tape cartridge */
-#define TPQIC150 3 /* QIC150 1/4" cartridge */
-#define TP9TRACK 4 /* 9 track reel */
-#define TP8MM_8200 5 /* 8 mm video tape cartridge */
-#define TP8MM_8500 6 /* 8 mm video tape cartridge */
-#define TPQIC1000 7 /* QIC1000 1/4" cartridge */
-#define TPQIC1350 8 /* QIC1350 1/4" cartridge */
-#define TP3480 9 /* 3480 compatible cartridge */
-#define TPDLT 10 /* DEC Digital Linear Tape cartridge */
-#define TPD2 11 /* D2 tape cartridge */
-#define TPDLTSTACKER 12 /* DEC Digital Linear Tape stacker */
-#define TPNTP 13 /* IBM Magstar 3590 Tape Device cartridge */
-#define TPNTPSTACKER 14 /* IBM Magstar 3590 Tape Device stacker */
-#define TPSTK9490 15 /* StorageTeK 9490 */
-#define TPSTKSD3 16 /* StorageTeK SD3 */
-#define TPGY10 17 /* Sony GY-10 */
-#define TP8MM_8900 18 /* 8 mm (AME) tape cartridge */
-#define TPMGSTRMP 19 /* IBM Magster MP 3570 cartridge */
-#define TPMGSTRMPSTCKR 20 /* IBM Magstar MP stacker */
-#define TPSTK4791 21 /* StorageTek 4791 */
-#define TPSTK4781 22 /* StorageTek 4781 */
-#define TPFUJDIANA1 23 /* Fujitsu Diana-1 (M1016/M1017) */
-#define TPFUJDIANA2 24 /* Fujitsu Diana-2 (M2483) */
-#define TPFUJDIANA3 25 /* Fujitsu Diana-3 (M2488) */
-#define TP8MM_AIT 26 /* Sony AIT format tape */
-#define TPTD3600 27 /* Philips TD3600 */
-#define TPTD3600STCKR 28 /* Philips TD3600 stacker */
-#define TPNCTP 29 /* Philips NCTP */
-#define TPGY2120 30 /* Sony GY-2120 (replaces GY-10) */
-#define TPOVL490E 31 /* Overland Data L490E (3490E compatible) */
-#define TPSTK9840 32 /* StorageTeK 9840 (aka Eagle) */
-
-/* Diagnostics inventory */
-#define INV_CPUDIAGVAL 70
-
-
-/*
- * GFX invent is a subset of gfxinfo
- */
-
-/* types for class graphics */
-#define INV_GR1BOARD 1 /* GR1 (Eclipse) graphics */
-#define INV_GR1BP 2 /* OBSOLETE - use INV_GR1BIT24 instead */
-#define INV_GR1ZBUFFER 3 /* OBSOLETE - use INV_GR1ZBUF24 instead */
-#define INV_GRODEV 4 /* Clover1 graphics */
-#define INV_GMDEV 5 /* GT graphics */
-#define INV_CG2 6 /* CG2 composite video/genlock board */
-#define INV_VMUXBOARD 7 /* VMUX video mux board */
-#define INV_VGX 8 /* VGX (PowerVision) graphics */
-#define INV_VGXT 9 /* VGXT (PowerVision) graphics with IMP5s. */
-#define INV_LIGHT 10 /* LIGHT graphics */
-#define INV_GR2 11 /* EXPRESS graphics */
-#define INV_RE 12 /* RealityEngine graphics */
-#define INV_VTX 13 /* RealityEngine graphics - VTX variant */
-#define INV_NEWPORT 14 /* Newport graphics */
-#define INV_MGRAS 15 /* Mardigras graphics */
-#define INV_IR 16 /* InfiniteReality graphics */
-#define INV_CRIME 17 /* Moosehead on board CRIME graphics */
-#define INV_IR2 18 /* InfiniteReality2 graphics */
-#define INV_IR2LITE 19 /* Reality graphics */
-#define INV_IR2E 20 /* InfiniteReality2e graphics */
-#define INV_ODSY 21 /* Odyssey graphics */
-#define INV_IR3 22 /* InfiniteReality3 graphics */
-
-/* states for graphics class GR1 */
-#define INV_GR1REMASK 0x7 /* RE version */
-#define INV_GR1REUNK 0x0 /* RE version unknown */
-#define INV_GR1RE1 0x1 /* RE1 */
-#define INV_GR1RE2 0x2 /* RE2 */
-#define INV_GR1BUSMASK 0x38 /* GR1 bus architecture */
-#define INV_GR1PB 0x00 /* Eclipse private bus */
-#define INV_GR1PBVME 0x08 /* VGR2 board VME and private bus interfaces */
-#define INV_GR1TURBO 0x40 /* has turbo option */
-#define INV_GR1BIT24 0x80 /* has bitplane option */
-#define INV_GR1ZBUF24 0x100 /* has z-buffer option */
-#define INV_GR1SMALLMON 0x200 /* using 14" monitor */
-#define INV_GR1SMALLMAP 0x400 /* has 256 entry color map */
-#define INV_GR1AUX4 0x800 /* has AUX/WID plane option */
-
-/* states for graphics class GR2 */
- /* bitmasks */
-#define INV_GR2_Z 0x1 /* has z-buffer option */
-#define INV_GR2_24 0x2 /* has bitplane option */
-#define INV_GR2_4GE 0x4 /* has 4 GEs */
-#define INV_GR2_1GE 0x8 /* has 1 GEs */
-#define INV_GR2_2GE 0x10 /* has 2 GEs */
-#define INV_GR2_8GE 0x20 /* has 8 GEs */
-#define INV_GR2_GR3 0x40 /* board GR3 */
-#define INV_GR2_GU1 0x80 /* board GU1 */
-#define INV_GR2_INDY 0x100 /* board GR3 on Indy*/
-#define INV_GR2_GR5 0x200 /* board GR3 with 4 GEs, hinv prints GR5-XZ */
-
- /* supported configurations */
-#define INV_GR2_XS 0x0 /* GR2-XS */
-#define INV_GR2_XSZ 0x1 /* GR2-XS with z-buffer */
-#define INV_GR2_XS24 0x2 /* GR2-XS24 */
-#define INV_GR2_XS24Z 0x3 /* GR2-XS24 with z-buffer */
-#define INV_GR2_XSM 0x4 /* GR2-XSM */
-#define INV_GR2_ELAN 0x7 /* GR2-Elan */
-#define INV_GR2_XZ 0x13 /* GR2-XZ */
-#define INV_GR3_XSM 0x44 /* GR3-XSM */
-#define INV_GR3_ELAN 0x47 /* GR3-Elan */
-#define INV_GU1_EXTREME 0xa3 /* GU1-Extreme */
-
-/* States for graphics class NEWPORT */
-#define INV_NEWPORT_XL 0x01 /* Indigo2 XL model */
-#define INV_NEWPORT_24 0x02 /* board has 24 bitplanes */
-#define INV_NEWTON 0x04 /* Triton SUBGR tagging */
-
-/* States for graphics class MGRAS */
-#define INV_MGRAS_ARCHS 0xff000000 /* architectures */
-#define INV_MGRAS_HQ3 0x00000000 /*impact*/
-#define INV_MGRAS_HQ4 0x01000000 /*gamera*/
-#define INV_MGRAS_MOT 0x02000000 /*mothra*/
-#define INV_MGRAS_GES 0x00ff0000 /* number of GEs */
-#define INV_MGRAS_1GE 0x00010000
-#define INV_MGRAS_2GE 0x00020000
-#define INV_MGRAS_RES 0x0000ff00 /* number of REs */
-#define INV_MGRAS_1RE 0x00000100
-#define INV_MGRAS_2RE 0x00000200
-#define INV_MGRAS_TRS 0x000000ff /* number of TRAMs */
-#define INV_MGRAS_0TR 0x00000000
-#define INV_MGRAS_1TR 0x00000001
-#define INV_MGRAS_2TR 0x00000002
-
-/* States for graphics class CRIME */
-#define INV_CRM_BASE 0x01 /* Moosehead basic model */
-
-/* States for graphics class ODSY */
-#define INV_ODSY_ARCHS 0xff000000 /* architectures */
-#define INV_ODSY_REVA_ARCH 0x01000000 /* Buzz Rev A */
-#define INV_ODSY_REVB_ARCH 0x02000000 /* Buzz Rev B */
-#define INV_ODSY_MEMCFG 0x00ff0000 /* memory configs */
-#define INV_ODSY_MEMCFG_32 0x00010000 /* 32MB memory */
-#define INV_ODSY_MEMCFG_64 0x00020000 /* 64MB memory */
-#define INV_ODSY_MEMCFG_128 0x00030000 /* 128MB memory */
-#define INV_ODSY_MEMCFG_256 0x00040000 /* 256MB memory */
-#define INV_ODSY_MEMCFG_512 0x00050000 /* 512MB memory */
-
-
-/* types for class network */
-#define INV_NET_ETHER 0 /* 10Mb Ethernet */
-#define INV_NET_HYPER 1 /* HyperNet */
-#define INV_NET_CRAYIOS 2 /* Cray Input/Ouput Subsystem */
-#define INV_NET_FDDI 3 /* FDDI */
-#define INV_NET_TOKEN 4 /* 16/4 Token Ring */
-#define INV_NET_HIPPI 5 /* HIPPI */
-#define INV_NET_ATM 6 /* ATM */
-#define INV_NET_ISDN_BRI 7 /* ISDN */
-#define INV_NET_ISDN_PRI 8 /* PRI ISDN */
-#define INV_NET_HIPPIS 9 /* HIPPI-Serial */
-#define INV_NET_GSN 10 /* GSN (aka HIPPI-6400) */
-#define INV_NET_MYRINET 11 /* Myricom PCI network */
-
-/* controllers for network types, unique within class network */
-#define INV_ETHER_EC 0 /* IP6 integral controller */
-#define INV_ETHER_ENP 1 /* CMC board */
-#define INV_ETHER_ET 2 /* IP5 integral controller */
-#define INV_HYPER_HY 3 /* HyperNet controller */
-#define INV_CRAYIOS_CFEI3 4 /* Cray Front End Interface, v3 */
-#define INV_FDDI_IMF 5 /* Interphase/Martin 3211 FDDI */
-#define INV_ETHER_EGL 6 /* Interphase V/4207 Eagle */
-#define INV_ETHER_FXP 7 /* CMC C/130 FXP */
-#define INV_FDDI_IPG 8 /* Interphase/SGI 4211 Peregrine FDDI */
-#define INV_TOKEN_FV 9 /* Formation fv1600 Token-Ring board */
-#define INV_FDDI_XPI 10 /* XPI GIO bus FDDI */
-#define INV_TOKEN_GTR 11 /* GTR GIO bus TokenRing */
-#define INV_ETHER_GIO 12 /* IP12/20 optional GIO ethernet controller */
-#define INV_ETHER_EE 13 /* Everest IO4 EPC SEEQ/EDLC */
-#define INV_HIO_HIPPI 14 /* HIO HIPPI for Challenge/Onyx */
-#define INV_ATM_GIO64 15 /* ATM OC-3c Mez card */
-#define INV_ETHER_EP 16 /* 8-port E-Plex Ethernet */
-#define INV_ISDN_SM 17 /* Siemens PEB 2085 */
-#define INV_TOKEN_MTR 18 /* EISA TokenRing */
-#define INV_ETHER_EF 19 /* IOC3 Fast Ethernet */
-#define INV_ISDN_48XP 20 /* Xircom PRI-48XP */
-#define INV_FDDI_RNS 21 /* Rockwell Network Systems FDDI */
-#define INV_HIPPIS_XTK 22 /* Xtalk HIPPI-Serial */
-#define INV_ATM_QUADOC3 23 /* Xtalk Quad OC-3c ATM interface */
-#define INV_TOKEN_MTRPCI 24 /* PCI TokenRing */
-#define INV_ETHER_ECF 25 /* PCI Fast Ethernet */
-#define INV_GFE 26 /* GIO Fast Ethernet */
-#define INV_VFE 27 /* VME Fast Ethernet */
-#define INV_ETHER_GE 28 /* Gigabit Ethernet */
-#define INV_ETHER_EFP INV_ETHER_EF /* unused (same as IOC3 Fast Ethernet) */
-#define INV_GSN_XTK1 29 /* single xtalk version of GSN */
-#define INV_GSN_XTK2 30 /* dual xtalk version of GSN */
-#define INV_FORE_HE 31 /* FORE HE ATM Card */
-#define INV_FORE_PCA 32 /* FORE PCA ATM Card */
-#define INV_FORE_VMA 33 /* FORE VMA ATM Card */
-#define INV_FORE_ESA 34 /* FORE ESA ATM Card */
-#define INV_FORE_GIA 35 /* FORE GIA ATM Card */
-
-/* Types for class INV_SCSI and INV_VSCSI; The type code is the same as
- * the device type code returned by the Inquiry command, iff the Inquiry
- * command defines a type code for the device in question. If it doesn't,
- * values over 31 will be used for the device type.
- * Note: the lun is encoded in bits 8-15 of the state. The
- * state field low 3 bits contains the information from the inquiry
- * cmd that indicates ANSI SCSI 1,2, etc. compliance, and bit 7
- * contains the inquiry info that indicates whether the media is
- * removable.
- */
-#define INV_PRINTER 2 /* SCSI printer */
-#define INV_CPU 3 /* SCSI CPU device */
-#define INV_WORM 4 /* write-once-read-many (e.g. optical disks) */
-#define INV_CDROM 5 /* CD-ROM */
-#define INV_SCANNER 6 /* scanners */
-#define INV_OPTICAL 7 /* optical disks (read-write) */
-#define INV_CHANGER 8 /* jukebox's for CDROMS, for example */
-#define INV_COMM 9 /* Communications device */
-#define INV_STARCTLR 12 /* Storage Array Controller */
-#define INV_RAIDCTLR 32 /* RAID ctlr actually gives type 0 */
-
-/* bit definitions for state field for class INV_SCSI */
-#define INV_REMOVE 0x80 /* has removable media */
-#define INV_SCSI_MASK 7 /* to which ANSI SCSI standard device conforms*/
-
-/* types for class INV_AUDIO */
-
-#define INV_AUDIO_HDSP 0 /* Indigo DSP system */
-#define INV_AUDIO_VIGRA110 1 /* ViGRA 110 audio board */
-#define INV_AUDIO_VIGRA210 2 /* ViGRA 210 audio board */
-#define INV_AUDIO_A2 3 /* HAL2 / Audio Module for Indigo 2 */
-#define INV_AUDIO_A3 4 /* Moosehead (IP32) AD1843 codec */
-#define INV_AUDIO_RAD 5 /* RAD PCI chip */
-
-/* types for class INV_VIDEO */
-
-#define INV_VIDEO_LIGHT 0
-#define INV_VIDEO_VS2 1 /* MultiChannel Option */
-#define INV_VIDEO_EXPRESS 2 /* kaleidecope video */
-#define INV_VIDEO_VINO 3
-#define INV_VIDEO_VO2 4 /* Sirius Video */
-#define INV_VIDEO_INDY 5 /* Indy Video - kal vid on Newport
- gfx on Indy */
-#define INV_VIDEO_MVP 6 /* Moosehead Video Ports */
-#define INV_VIDEO_INDY_601 7 /* Indy Video 601 */
-#define INV_VIDEO_PMUX 8 /* PALMUX video w/ PGR gfx */
-#define INV_VIDEO_MGRAS 9 /* Galileo 1.5 video */
-#define INV_VIDEO_DIVO 10 /* DIVO video */
-#define INV_VIDEO_RACER 11 /* SpeedRacer Pro Video */
-#define INV_VIDEO_EVO 12 /* EVO Personal Video */
-#define INV_VIDEO_XTHD 13 /* XIO XT-HDTV video */
-#define INV_VIDEO_XTDIGVID 14 /* XIO XT-HDDIGVID video */
-
-/* states for video class INV_VIDEO_EXPRESS */
-
-#define INV_GALILEO_REV 0xF
-#define INV_GALILEO_JUNIOR 0x10
-#define INV_GALILEO_INDY_CAM 0x20
-#define INV_GALILEO_DBOB 0x40
-#define INV_GALILEO_ELANTEC 0x80
-
-/* states for video class VINO */
-
-#define INV_VINO_REV 0xF
-#define INV_VINO_INDY_CAM 0x10
-#define INV_VINO_INDY_NOSW 0x20 /* nebulous - means s/w not installed */
-
-/* states for video class MVP */
-
-#define INV_MVP_REV(x) (((x)&0x0000000f))
-#define INV_MVP_REV_SW(x) (((x)&0x000000f0)>>4)
-#define INV_MVP_AV_BOARD(x) (((x)&0x00000f00)>>8)
-#define INV_MVP_AV_REV(x) (((x)&0x0000f000)>>12)
-#define INV_MVP_CAMERA(x) (((x)&0x000f0000)>>16)
-#define INV_MVP_CAM_REV(x) (((x)&0x00f00000)>>20)
-#define INV_MVP_SDIINF(x) (((x)&0x0f000000)>>24)
-#define INV_MVP_SDI_REV(x) (((x)&0xf0000000)>>28)
-
-/* types for class INV_BUS */
-
-#define INV_BUS_VME 0
-#define INV_BUS_EISA 1
-#define INV_BUS_GIO 2
-#define INV_BUS_BT3_PCI 3
-
-/* types for class INV_MISC */
-#define INV_MISC_EPC_EINT 0 /* EPC external interrupts */
-#define INV_MISC_PCKM 1 /* pc keyboard or mouse */
-#define INV_MISC_IOC3_EINT 2 /* IOC3 external interrupts */
-#define INV_MISC_OTHER 3 /* non-specific type */
-
-/*
- * The four components below do not actually have inventory information
- * associated with the vertex. These symbols are used by grio at the
- * moment to figure out the device type from the vertex. If these get
- * inventory structures in the future, either the type values must
- * remain the same or grio code needs to change.
- */
-
-#define INV_XBOW 3 /* cross bow */
-#define INV_HUB 4 /* hub */
-#define INV_PCI_BRIDGE 5 /* pci bridge */
-#define INV_ROUTER 6 /* router */
-
-/* types for class INV_PROM */
-#define INV_IO6PROM 0
-#define INV_IP27PROM 1
-#define INV_IP35PROM 2
-
-/* types for class INV_COMPRESSION */
-
-#define INV_COSMO 0
-#define INV_INDYCOMP 1
-#define INV_IMPACTCOMP 2 /* cosmo2, aka impact compression */
-#define INV_VICE 3 /* Video imaging & compression engine */
-
-/* types for class INV_DISPLAY */
-#define INV_PRESENTER_BOARD 0 /* Indy Presenter adapter board */
-#define INV_PRESENTER_PANEL 1 /* Indy Presenter board and panel */
-#define INV_ICO_BOARD 2 /* IMPACT channel option board */
-#define INV_DCD_BOARD 3 /* O2 dual channel option board */
-#define INV_7of9_BOARD 4 /* 7of9 flatpanel adapter board */
-#define INV_7of9_PANEL 5 /* 7of9 flatpanel board and panel */
-
-/* types for class INV_IEEE1394 */
-#define INV_OHCI 0 /* Ohci IEEE1394 pci card */
-
-/* state for class INV_IEEE1394 & type INV_OHCI */
-#define INV_IEEE1394_STATE_TI_REV_1 0
-
-/* O2 DVLink 1.1 controller static info */
-#define INV_IEEE1394_CTLR_O2_DVLINK_11 0x8009104c
-
-/* types for class INV_TPU */
-#define INV_TPU_EXT 0 /* External XIO Tensor Processing Unit */
-#define INV_TPU_XIO 1 /* Internal XIO Tensor Processing Unit */
-
-/*
- * USB Types. The upper 8 bits contain general usb device class and are used to
- * qualify the lower 8 bits which contain device type within a usb class.
- * Use USB_INV_DEVCLASS and USB_INV_DEVTYPE to to decode an i_type, and
- * USB_INV_TYPE to set it.
- */
-
-#define USB_INV_DEVCLASS(invtype) ((invtype) >> 8)
-#define USB_INV_DEVTYPE(invtype) ((invtype) & 0xf)
-#define USB_INV_TYPE(usbclass, usbtype) (((usbclass) << 8) | (usbtype))
-
-/*
- * USB device classes. These classes might not match the classes as defined
- * by the usb spec, but where possible we will try.
- */
-
-#define USB_INV_CLASS_RH 0x00 /* root hub (ie. controller) */
-#define USB_INV_CLASS_HID 0x03 /* human interface device */
-#define USB_INV_CLASS_HUB 0x09 /* hub device */
-
-/*
- * USB device types within a class. These will not match USB device types,
- * as the usb is not consistent on how specific types are defined (sometimes
- * they are found in the interface subclass, sometimes (as in HID devices) they
- * are found within data generated by the device (hid report descriptors for
- * example).
- */
-
-/*
- * RH types
- */
-
-#define USB_INV_RH_OHCI 0x01 /* ohci root hub */
-
-/*
- * HID types
- */
-
-#define USB_INV_HID_KEYBOARD 0x01 /* kbd (HID class) */
-#define USB_INV_HID_MOUSE 0x02 /* mouse (HID class) */
-
-/*
- * HUB types - none yet
- */
-
-typedef struct invent_generic_s {
- unsigned short ig_module;
- unsigned short ig_slot;
- unsigned char ig_flag;
- int ig_invclass;
-} invent_generic_t;
-
-#define INVENT_ENABLED 0x1
-
-typedef struct invent_membnkinfo {
- unsigned short imb_size; /* bank size in MB */
- unsigned short imb_attr; /* Mem attributes */
- unsigned int imb_flag; /* bank flags */
-} invent_membnkinfo_t;
-
-
-typedef struct invent_meminfo {
- invent_generic_t im_gen;
- unsigned short im_size; /* memory size */
- unsigned short im_banks; /* number of banks */
- /*
- * declare an array with one element. Each platform is expected to
- * allocate the size required based on the number of banks and set
- * the im_banks correctly for this array traversal.
- */
- invent_membnkinfo_t im_bank_info[1];
-} invent_meminfo_t;
-
-#define INV_MEM_PREMIUM 0x01
-
-typedef struct invent_cpuinfo {
- invent_generic_t ic_gen;
- cpu_inv_t ic_cpu_info;
- unsigned short ic_cpuid;
- unsigned short ic_slice;
- unsigned short ic_cpumode;
-
-} invent_cpuinfo_t;
-
-typedef struct invent_rpsinfo {
- invent_generic_t ir_gen;
- int ir_xbox; /* is RPS connected to an xbox */
-} invent_rpsinfo_t;
-
-typedef struct invent_miscinfo {
- invent_generic_t im_gen;
- int im_rev;
- int im_version;
- int im_type;
- uint64_t im_speed;
-} invent_miscinfo_t;
-
-
-typedef struct invent_routerinfo{
- invent_generic_t im_gen;
- router_inv_t rip;
-} invent_routerinfo_t;
-
-
-
-#ifdef __KERNEL__
-
-typedef struct irix5_inventory_s {
- app32_ptr_t inv_next; /* next inventory record in list */
- int inv_class; /* class of object */
- int inv_type; /* class sub-type of object */
- major_t inv_controller; /* object major identifier */
- minor_t inv_unit; /* object minor identifier */
- int inv_state; /* information specific to object or
- class */
-} irix5_inventory_t;
-
-typedef struct invplace_s {
- vertex_hdl_t invplace_vhdl; /* current vertex */
- vertex_hdl_t invplace_vplace; /* place in vertex list */
- inventory_t *invplace_inv; /* place in inv list on vertex */
-} invplace_t; /* Magic cookie placeholder in inventory list */
-
-extern invplace_t invplace_none;
-#define INVPLACE_NONE invplace_none
-
-static inline void device_inventory_add(vertex_hdl_t device,
- int class,
- int type,
- major_t ctlr,
- minor_t unit,
- int state)
-{
-}
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_IA64_SN_INVENT_H */
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/addrs.h>
-#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
#include <asm/sn/intr.h>
typedef cpuid_t cpu_cookie_t;
#define CPU_NONE (-1)
+#define GRAPH_VERTEX_NONE ((vertex_hdl_t)-1)
+
/*
* mutext support mapping
#define PRINT_PANIC panic
-/* print_register() defs */
-
-/*
- * register values
- * map between numeric values and symbolic values
- */
-struct reg_values {
- unsigned long long rv_value;
- char *rv_name;
-};
-
-/*
- * register descriptors are used for formatted prints of register values
- * rd_mask and rd_shift must be defined, other entries may be null
- */
-struct reg_desc {
- unsigned long long rd_mask; /* mask to extract field */
- int rd_shift; /* shift for extracted value, - >>, + << */
- char *rd_name; /* field name */
- char *rd_format; /* format to print field */
- struct reg_values *rd_values; /* symbolic names of values */
-};
-
-extern void print_register(unsigned long long, struct reg_desc *);
-
/******************************************
* Definitions that do not exist in linux *
******************************************/
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