drm/amd/amdgpu/include : update mes api header v11/v12

Update the parameter in SET_HW_RESOURCES API 1. Align with the setting
of enable_lr_compute_wa 2. Add enable_compute_pipe_reset to enable
pipe reset when compute queue reset failes

v2: add driver flags to track when we enable it

Signed-off-by: Shaoyun Liu <shaoyun.liu@amd.com>
Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 454a5a58863e47f496fa896f7c0219046b009243..5255360353f4bb7e680d530e7b3cbb89fd36e18e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -168,6 +168,9 @@ struct amdgpu_mes {
        int                 master_xcc_ids[AMDGPU_MAX_MES_INST_PIPES];
        struct amdgpu_bo    *shared_cmd_buf_obj[AMDGPU_MAX_MES_INST_PIPES];
        uint64_t            shared_cmd_buf_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];
+
+       bool                    compute_pipe_reset_enabled;
+       bool                    gfx_pipe_reset_enabled;
 };
 
 struct amdgpu_mes_hung_queue_hqd_info {

diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
index f9629d42ada2724b2285853a702f4dd2383b2b6d..6644fabeb0b780458a0cd2e7823b04f91fee8d86 100644 (file)
--- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
+++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
@@ -238,8 +238,9 @@ union MESAPI_SET_HW_RESOURCES {
                                uint32_t enable_mes_sch_stb_log : 1;
                                uint32_t limit_single_process : 1;
                                uint32_t is_strix_tmz_wa_enabled  :1;
-                               uint32_t enable_lr_compute_wa : 1;
-                               uint32_t reserved : 12;
+                               uint32_t enable_lr_compute_wa : 2;
+                               uint32_t enable_compute_pipe_reset : 1;
+                               uint32_t reserved : 10;
                        };
                        uint32_t        uint32_t_all;
                };

diff --git a/drivers/gpu/drm/amd/include/mes_v12_api_def.h b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
index e541a43714a10b1bb865c928a3083adfa2b2f5f4..cb7ebdfffeeb7630b78200cda9e20d76045b57f2 100644 (file)
--- a/drivers/gpu/drm/amd/include/mes_v12_api_def.h
+++ b/drivers/gpu/drm/amd/include/mes_v12_api_def.h
@@ -294,8 +294,9 @@ union MESAPI_SET_HW_RESOURCES {
                                uint32_t limit_single_process : 1;
                                uint32_t unmapped_doorbell_handling: 2;
                                uint32_t enable_mes_fence_int: 1;
-                               uint32_t enable_lr_compute_wa : 1;
-                               uint32_t reserved : 9;
+                               uint32_t enable_lr_compute_wa : 2;
+                               uint32_t enable_compute_pipe_reset : 1;
+                               uint32_t reserved : 7;
                        };
                        uint32_t uint32_all;
                };