drm/amd/display/amdgpu_dm: show error names

Convert printk() args that log error numbers to log the names.

Acked-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a5961e19bf8cec01969d39b998ae495406e1c7c8..eefd52714533cd9cfcb32e666eaf17d9f511a146 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6849,7 +6849,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
        ret = drm_atomic_helper_check_modeset(dev, state);
        if (ret) {
-               drm_dbg_atomic(dev, "drm_atomic_helper_check_modeset() failed\n");
+               drm_dbg_atomic(dev, "drm_atomic_helper_check_modeset() failed: %pe\n", ERR_PTR(ret));
                goto fail;
        }
 
@@ -6864,7 +6864,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                new_crtc_state = drm_atomic_get_crtc_state(state, new_con_state->crtc);
                if (IS_ERR(new_crtc_state)) {
-                       drm_dbg_atomic(dev, "drm_atomic_get_crtc_state() failed\n");
+                       drm_dbg_atomic(dev, "drm_atomic_get_crtc_state() failed: %pe\n", new_crtc_state);
                        ret = PTR_ERR(new_crtc_state);
                        goto fail;
                }
@@ -6884,7 +6884,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                        if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
                                ret = add_affected_mst_dsc_crtcs(state, crtc);
                                if (ret) {
-                                       drm_dbg_atomic(dev, "add_affected_mst_dsc_crtcs() failed\n");
+                                       drm_dbg_atomic(dev, "add_affected_mst_dsc_crtcs() failed: %pe\n", ERR_PTR(ret));
                                        goto fail;
                                }
                        }
@@ -6901,7 +6901,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                ret = amdgpu_dm_verify_lut_sizes(new_crtc_state);
                if (ret) {
-                       drm_dbg_atomic(dev, "amdgpu_dm_verify_lut_sizes() failed\n");
+                       drm_dbg_atomic(dev, "amdgpu_dm_verify_lut_sizes() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
@@ -6910,13 +6910,13 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                ret = drm_atomic_add_affected_connectors(state, crtc);
                if (ret) {
-                       drm_dbg_atomic(dev, "drm_atomic_add_affected_connectors() failed\n");
+                       drm_dbg_atomic(dev, "drm_atomic_add_affected_connectors() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
                ret = drm_atomic_add_affected_planes(state, crtc);
                if (ret) {
-                       drm_dbg_atomic(dev, "drm_atomic_add_affected_planes() failed\n");
+                       drm_dbg_atomic(dev, "drm_atomic_add_affected_planes() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
@@ -6955,7 +6955,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                        if (IS_ERR(new_plane_state)) {
                                ret = PTR_ERR(new_plane_state);
-                               drm_dbg_atomic(dev, "new_plane_state is BAD\n");
+                               drm_dbg_atomic(dev, "new_plane_state is BAD: %pe\n", new_plane_state);
                                goto fail;
                        }
                }
@@ -6969,7 +6969,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
         */
        ret = drm_atomic_normalize_zpos(dev, state);
        if (ret) {
-               drm_dbg(dev, "drm_atomic_normalize_zpos() failed\n");
+               drm_dbg(dev, "drm_atomic_normalize_zpos() failed: %pe\n", ERR_PTR(ret));
                goto fail;
        }
 
@@ -6983,7 +6983,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                ret = dm_crtc_get_cursor_mode(adev, state, dm_new_crtc_state,
                                              &dm_new_crtc_state->cursor_mode);
                if (ret) {
-                       drm_dbg(dev, "Failed to determine cursor mode\n");
+                       drm_dbg(dev, "Failed to determine cursor mode: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
@@ -7015,7 +7015,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                                            &lock_and_validation_needed,
                                            &is_top_most_overlay);
                if (ret) {
-                       drm_dbg_atomic(dev, "dm_update_plane_state() failed\n");
+                       drm_dbg_atomic(dev, "dm_update_plane_state() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
        }
@@ -7028,7 +7028,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                                           false,
                                           &lock_and_validation_needed);
                if (ret) {
-                       drm_dbg_atomic(dev, "DISABLE: dm_update_crtc_state() failed\n");
+                       drm_dbg_atomic(dev, "DISABLE: dm_update_crtc_state() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
        }
@@ -7041,7 +7041,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                                           true,
                                           &lock_and_validation_needed);
                if (ret) {
-                       drm_dbg_atomic(dev, "ENABLE: dm_update_crtc_state() failed\n");
+                       drm_dbg_atomic(dev, "ENABLE: dm_update_crtc_state() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
        }
@@ -7055,7 +7055,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                                            &lock_and_validation_needed,
                                            &is_top_most_overlay);
                if (ret) {
-                       drm_dbg_atomic(dev, "dm_update_plane_state() failed\n");
+                       drm_dbg_atomic(dev, "dm_update_plane_state() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
        }
@@ -7071,7 +7071,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
        /* Run this here since we want to validate the streams we created */
        ret = drm_atomic_helper_check_planes(dev, state);
        if (ret) {
-               drm_dbg_atomic(dev, "drm_atomic_helper_check_planes() failed\n");
+               drm_dbg_atomic(dev, "drm_atomic_helper_check_planes() failed: %pe\n", ERR_PTR(ret));
                goto fail;
        }
 
@@ -7209,13 +7209,13 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
        if (lock_and_validation_needed) {
                ret = dm_atomic_get_state(state, &dm_state);
                if (ret) {
-                       drm_dbg_atomic(dev, "dm_atomic_get_state() failed\n");
+                       drm_dbg_atomic(dev, "dm_atomic_get_state() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
                ret = do_aquire_global_lock(dev, state);
                if (ret) {
-                       drm_dbg_atomic(dev, "do_aquire_global_lock() failed\n");
+                       drm_dbg_atomic(dev, "do_aquire_global_lock() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
@@ -7223,7 +7223,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                if (dc_resource_is_dsc_encoding_supported(dc)) {
                        ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
                        if (ret) {
-                               drm_dbg_atomic(dev, "MST_DSC compute_mst_dsc_configs_for_state() failed\n");
+                               drm_dbg_atomic(dev, "MST_DSC compute_mst_dsc_configs_for_state() failed: %pe\n", ERR_PTR(ret));
                                ret = -EINVAL;
                                goto fail;
                        }
@@ -7232,7 +7232,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 
                ret = dm_update_mst_vcpi_slots_for_dsc(state, dm_state->context, vars);
                if (ret) {
-                       drm_dbg_atomic(dev, "dm_update_mst_vcpi_slots_for_dsc() failed\n");
+                       drm_dbg_atomic(dev, "dm_update_mst_vcpi_slots_for_dsc() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
 
@@ -7244,7 +7244,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
                 */
                ret = drm_dp_mst_atomic_check(state);
                if (ret) {
-                       drm_dbg_atomic(dev, "MST drm_dp_mst_atomic_check() failed\n");
+                       drm_dbg_atomic(dev, "MST drm_dp_mst_atomic_check() failed: %pe\n", ERR_PTR(ret));
                        goto fail;
                }
                status = dc_validate_global_state(dc, dm_state->context, DC_VALIDATE_MODE_ONLY);
@@ -7333,7 +7333,7 @@ fail:
        else if (ret == -EINTR || ret == -EAGAIN || ret == -ERESTARTSYS)
                drm_dbg_atomic(dev, "Atomic check stopped due to signal.\n");
        else
-               drm_dbg_atomic(dev, "Atomic check failed with err: %d\n", ret);
+               drm_dbg_atomic(dev, "Atomic check failed: %pe\n", ERR_PTR(ret));
 
        trace_amdgpu_dm_atomic_check_finish(state, ret);
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index fa05734047e00c47d68487bb35185dab32c862a2..9a34e0014084fa32be032d722b7cdd57edf042b4 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -374,7 +374,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers(s
 
        ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);
        if (ret)
-               drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %d\n", ret);
+               drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %pe\n", ERR_PTR(ret));
 
        return ret;
 }
@@ -415,7 +415,7 @@ STATIC_IFN_KUNIT int amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers(
        /* TODO: This seems wrong because there is no DCC plane on GFX12. */
        ret = amdgpu_dm_plane_validate_dcc(adev, format, rotation, tiling_info, dcc, address, plane_size);
        if (ret)
-               drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned error: %d\n", ret);
+               drm_dbg_kms(adev_to_drm(adev), "amdgpu_dm_plane_validate_dcc: returned: %pe\n", ERR_PTR(ret));
 
        return ret;
 }
@@ -975,13 +975,15 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,
        adev = amdgpu_ttm_adev(rbo->tbo.bdev);
        r = amdgpu_bo_reserve(rbo, true);
        if (r) {
-               drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);
+               drm_err(adev_to_drm(adev), "fail to reserve bo: %pe\n", ERR_PTR(r));
                return r;
        }
 
        r = dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES);
-       if (r)
+       if (r) {
+               drm_err(adev_to_drm(adev), "reserving fence slot failed: %pe\n", ERR_PTR(r));
                goto error_unlock;
+       }
 
        if (plane->type != DRM_PLANE_TYPE_CURSOR)
                domain = amdgpu_display_supported_domains(adev, rbo->flags);
@@ -992,13 +994,13 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,
        r = amdgpu_bo_pin(rbo, domain);
        if (unlikely(r != 0)) {
                if (r != -ERESTARTSYS)
-                       DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
+                       DRM_ERROR("Failed to pin framebuffer: %pe\n", ERR_PTR(r));
                goto error_unlock;
        }
 
        r = amdgpu_ttm_alloc_gart(&rbo->tbo);
        if (unlikely(r != 0)) {
-               DRM_ERROR("%p bind failed\n", rbo);
+               DRM_ERROR("%p bind failed: %pe\n", rbo, ERR_PTR(r));
                goto error_unpin;
        }
 
@@ -1058,7 +1060,7 @@ static void amdgpu_dm_plane_helper_cleanup_fb(struct drm_plane *plane,
        rbo = gem_to_amdgpu_bo(old_state->fb->obj[0]);
        r = amdgpu_bo_reserve(rbo, false);
        if (unlikely(r)) {
-               DRM_ERROR("failed to reserve rbo before unpin\n");
+               DRM_ERROR("failed to reserve rbo before unpin: %pe\n", ERR_PTR(r));
                return;
        }
 
@@ -1868,8 +1870,8 @@ dm_plane_init_colorops(struct drm_plane *plane)
        if (dc->ctx->dce_version >= DCN_VERSION_3_0) {
                ret = amdgpu_dm_initialize_default_pipeline(plane, &pipelines[len]);
                if (ret) {
-                       drm_err(plane->dev, "Failed to create color pipeline for plane %d: %d\n",
-                               plane->base.id, ret);
+                       drm_err(plane->dev, "Failed to create color pipeline for plane %d: %pe\n",
+                               plane->base.id, ERR_PTR(ret));
                        goto out;
                }
                len++;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
index 1fbb568a5c8028b83ac2c306d1609f1423c373c1..9e7bad4d6ed0c5de1be8e6f29fa3ace739a91486 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c
@@ -107,13 +107,15 @@ STATIC_IFN_KUNIT int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb
 
        r = amdgpu_bo_reserve(rbo, true);
        if (r) {
-               drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);
+               drm_err(adev_to_drm(adev), "fail to reserve bo: %pe\n", ERR_PTR(r));
                return r;
        }
 
        r = dma_resv_reserve_fences(rbo->tbo.base.resv, TTM_NUM_MOVE_FENCES);
-       if (r)
+       if (r) {
+               drm_err(adev_to_drm(adev), "reserving fence slot failed: %pe\n", ERR_PTR(r));
                goto error_unlock;
+       }
 
        domain = amdgpu_display_supported_domains(adev, rbo->flags);
 
@@ -121,13 +123,13 @@ STATIC_IFN_KUNIT int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb
        r = amdgpu_bo_pin(rbo, domain);
        if (unlikely(r != 0)) {
                if (r != -ERESTARTSYS)
-                       DRM_ERROR("Failed to pin framebuffer with error %d\n", r);
+                       DRM_ERROR("Failed to pin framebuffer: %pe\n", ERR_PTR(r));
                goto error_unlock;
        }
 
        r = amdgpu_ttm_alloc_gart(&rbo->tbo);
        if (unlikely(r != 0)) {
-               DRM_ERROR("%p bind failed\n", rbo);
+               DRM_ERROR("%p bind failed: %pe\n", rbo, ERR_PTR(r));
                goto error_unpin;
        }
 
@@ -160,7 +162,7 @@ STATIC_IFN_KUNIT void amdgpu_dm_wb_cleanup_job(struct drm_writeback_connector *c
        rbo = gem_to_amdgpu_bo(job->fb->obj[0]);
        r = amdgpu_bo_reserve(rbo, false);
        if (unlikely(r)) {
-               DRM_ERROR("failed to reserve rbo before unpin\n");
+               DRM_ERROR("failed to reserve rbo before unpin: %pe\n", ERR_PTR(r));
                return;
        }