static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
{
struct device_node *volt_gpio_np;
+ u32 *reg;
/* OF only reports the high frequency */
hi_freq = cur_freq;
return 1;
}
- u32 *reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
+ reg = (u32 *)get_property(volt_gpio_np, "reg", NULL);
voltage_gpio = *reg;
set_speed_proc = dfs_set_cpu_speed;
oldvalp = (void *) A(a32.oldval);
newvalp = (void *) A(a32.newval);
- if ((oldvalp && get_user(oldlen, (int *) A(a32.oldlenp)))
+ if ((oldvalp && get_user(oldlen, (int __user *)compat_ptr(a32.oldlenp)))
|| !access_ok(VERIFY_WRITE, namep, 0)
|| !access_ok(VERIFY_WRITE, oldvalp, 0)
|| !access_ok(VERIFY_WRITE, newvalp, 0))
unlock_kernel();
set_fs(old_fs);
- if (oldvalp && put_user (oldlen, (int *) A(a32.oldlenp)))
+ if (oldvalp && put_user (oldlen, (int __user *)compat_ptr(a32.oldlenp)))
return -EFAULT;
return ret;
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/ioport.h>
-#include <linux/irq.h>
+#include <asm/irq.h>
#ifdef CONFIG_HIGH_RES_TIMERS
#include <linux/hrtime.h>
# if defined(schedule_next_int)
static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
{
int i = 0;
- unsigned char status;
/* wait for command completion */
- while ((status = read_reg(info, (unsigned char)(channel+STAR)) & BIT2)) {
+ while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
udelay(1);
if (i++ == 1000)
return FALSE;
register u32 _crc;
_crc = crc;
- __asm __volatile (
+ __asm__ __volatile__ (
"xorl %%ebx, %%ebx\n"
"movl %2, %%esi\n"
"movl %3, %%ecx\n"
#ifdef MEMCPYTOIO_WORKS
memcpy_toio(va.vaddr + offs, src, len);
#elif defined(MEMCPYTOIO_WRITEL)
-#define srcd ((const u_int32_t*)src)
if (offs & 3) {
while (len >= 4) {
- mga_writel(va, offs, get_unaligned(srcd++));
+ mga_writel(va, offs, get_unaligned((u32 *)src));
offs += 4;
len -= 4;
+ src += 4;
}
} else {
while (len >= 4) {
- mga_writel(va, offs, *srcd++);
+ mga_writel(va, offs, *(u32 *)src);
offs += 4;
len -= 4;
+ src += 4;
}
}
-#undef srcd
if (len) {
u_int32_t tmp;
if (interp_aout) {
argv = sp + 2;
envp = argv + argc + 1;
- __put_user((elf_addr_t)(long)argv, sp++);
- __put_user((elf_addr_t)(long)envp, sp++);
+ __put_user((elf_addr_t)(unsigned long)argv, sp++);
+ __put_user((elf_addr_t)(unsigned long)envp, sp++);
} else {
argv = sp;
envp = argv + argc + 1;
int *src_err, int *dst_err);
#define csum_partial_copy_from_user(src, dst, len, sum, errp) \
- csum_partial_copy_generic((src), (dst), (len), (sum), (errp), 0)
+ csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL)
/* FIXME: this needs to be written to really do no check -- Cort */
#define csum_partial_copy_nocheck(src, dst, len, sum) \
- csum_partial_copy_generic((src), (dst), (len), (sum), 0, 0)
+ csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
/*
* turns a 32-bit partial checksum (e.g. from csum_partial) into a
volatile int doing_pdma = 0;
/* This is software state */
-char *pdma_base = 0;
+char *pdma_base = NULL;
unsigned long pdma_areasize;
/* Common routines to all controller types on the Sparc. */
doing_pdma = 0;
if (pdma_base) {
mmu_unlockarea(pdma_base, pdma_areasize);
- pdma_base = 0;
+ pdma_base = NULL;
}
}
} else {
#ifdef CONFIG_PCI
struct linux_ebus *ebus;
- struct linux_ebus_device *edev = 0;
+ struct linux_ebus_device *edev = NULL;
unsigned long config = 0;
unsigned long auxio_reg;
typedef u32 compat_sigset_word;
#define COMPAT_OFF_T_MAX 0x7fffffff
-#define COMPAT_LOFF_T_MAX 0x7fffffffffffffff
+#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
struct compat_ipc64_perm {
compat_key_t key;
struct mtd_oob_buf {
uint32_t start;
uint32_t length;
- unsigned char *ptr;
+ unsigned char __user *ptr;
};
#define MTD_ABSENT 0
#if defined(CONFIG_PPC32) && defined(CONFIG_6xx)
extern unsigned long powersave_nap;
int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
- void *buffer, size_t *lenp);
+ void __user *buffer, size_t *lenp);
#endif
#ifdef CONFIG_BSD_PROCESS_ACCT