bool debug_largebar;
bool debug_disable_soft_recovery;
bool debug_use_vram_fw_buf;
- bool debug_enable_ras_aca;
bool debug_exp_resets;
bool debug_disable_gpu_ring_reset;
bool debug_vm_userptr;
AMDGPU_DEBUG_LARGEBAR = BIT(1),
AMDGPU_DEBUG_DISABLE_GPU_SOFT_RECOVERY = BIT(2),
AMDGPU_DEBUG_USE_VRAM_FW_BUF = BIT(3),
- AMDGPU_DEBUG_ENABLE_RAS_ACA = BIT(4),
AMDGPU_DEBUG_ENABLE_EXP_RESETS = BIT(5),
AMDGPU_DEBUG_DISABLE_GPU_RING_RESET = BIT(6),
AMDGPU_DEBUG_SMU_POOL = BIT(7),
adev->debug_use_vram_fw_buf = true;
}
- if (amdgpu_debug_mask & AMDGPU_DEBUG_ENABLE_RAS_ACA) {
- pr_info("debug: enable RAS ACA\n");
- adev->debug_enable_ras_aca = true;
- }
-
if (amdgpu_debug_mask & AMDGPU_DEBUG_ENABLE_EXP_RESETS) {
pr_info("debug: enable experimental reset features\n");
adev->debug_exp_resets = true;
if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
- amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||
- adev->debug_enable_ras_aca)
+ amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6))
con->uniras_enabled = true;
else
return 0;