[TG3]: Fix clock control programming on 5705/5750.

Need to clear one bit at a time, so if we are
clearing both 625_CORE_CLOCK and ALTCLOCK
we first clear the latter then the final
write will clear the former.

Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index a24e7156548a6fff52131e4085de636a72baa4a5..b8569dd0ec107cd0635904e89e6cdeabd0464c6c 100644 (file)
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -445,9 +445,14 @@ static void tg3_switch_clocks(struct tg3 *tp)
                       0x1f);
        tp->pci_clock_ctrl = clock_ctrl;
 
-       if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
-           GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
-           (orig_clock_ctrl & CLOCK_CTRL_44MHZ_CORE) != 0) {
+       if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
+           GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
+               if (orig_clock_ctrl & CLOCK_CTRL_625_CORE) {
+                       tw32_f(TG3PCI_CLOCK_CTRL,
+                              clock_ctrl | CLOCK_CTRL_625_CORE);
+                       udelay(40);
+               }
+       } else if ((orig_clock_ctrl & CLOCK_CTRL_44MHZ_CORE) != 0) {
                tw32_f(TG3PCI_CLOCK_CTRL,
                     clock_ctrl |
                     (CLOCK_CTRL_44MHZ_CORE | CLOCK_CTRL_ALTCLK));