return -EINVAL;
if (act) {
+ compat_uptr_t handler, restorer;
+
if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
- __get_user((long)new_ka.sa.sa_handler, &act->sa_handler) ||
+ __get_user(handler, &act->sa_handler) ||
__get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
- __get_user((long)new_ka.sa.sa_restorer, &act->sa_restorer)||
+ __get_user(restorer, &act->sa_restorer)||
__copy_from_user(&set32, &act->sa_mask, sizeof(compat_sigset_t)))
return -EFAULT;
-
+ new_ka.sa.sa_handler = compat_ptr(handler);
+ new_ka.sa.sa_restorer = compat_ptr(restorer);
/* FIXME: here we rely on _COMPAT_NSIG_WORS to be >= than _NSIG_WORDS << 1 */
switch (_NSIG_WORDS) {
case 4: new_ka.sa.sa_mask.sig[3] = set32.sig[6]
if (act) {
compat_old_sigset_t mask;
+ compat_uptr_t handler, restorer;
if (verify_area(VERIFY_READ, act, sizeof(*act)) ||
- __get_user((long)new_ka.sa.sa_handler, &act->sa_handler) ||
+ __get_user(handler, &act->sa_handler) ||
__get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
- __get_user((long)new_ka.sa.sa_restorer, &act->sa_restorer) ||
+ __get_user(restorer, &act->sa_restorer) ||
__get_user(mask, &act->sa_mask))
return -EFAULT;
+
+ new_ka.sa.sa_handler = compat_ptr(handler);
+ new_ka.sa.sa_restorer = compat_ptr(restorer);
+
siginitset(&new_ka.sa.sa_mask, mask);
}
put_user(reclen, &dirent->d_reclen);
copy_to_user(dirent->d_name, name, namlen);
put_user(0, dirent->d_name + namlen);
- ((char *) dirent) += reclen;
+ dirent = ((void *)dirent) + reclen;
buf->current_dir = dirent;
buf->count -= reclen;
return 0;
/* Find a PCI capability */
static __u32 __init find_cap(int num, int slot, int func, int cap)
{
+ u8 pos;
+ int bytes;
if (!(read_pci_config_16(num,slot,func,PCI_STATUS) & PCI_STATUS_CAP_LIST))
return 0;
- u8 pos = read_pci_config_byte(num,slot,func,PCI_CAPABILITY_LIST);
- int bytes;
+ pos = read_pci_config_byte(num,slot,func,PCI_CAPABILITY_LIST);
for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
+ u8 id;
pos &= ~3;
- u8 id = read_pci_config_byte(num,slot,func,pos+PCI_CAP_LIST_ID);
+ id = read_pci_config_byte(num,slot,func,pos+PCI_CAP_LIST_ID);
if (id == 0xff)
break;
if (id == cap)
/* Read a standard AGPv3 bridge header */
static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order)
{
- printk("AGP bridge at %02x:%02x:%02x\n", num, slot, func);
- u32 apsizereg = read_pci_config_16(num,slot,func, cap + 0x14);
+ u32 apsize;
+ u32 apsizereg;
+ int nbits;
+ u32 aper_low, aper_hi;
+ u64 aper;
+ printk("AGP bridge at %02x:%02x:%02x\n", num, slot, func);
+ apsizereg = read_pci_config_16(num,slot,func, cap + 0x14);
if (apsizereg == 0xffffffff) {
printk("APSIZE in AGP bridge unreadable\n");
return 0;
}
- u32 apsize = apsizereg & 0xfff;
+ apsize = apsizereg & 0xfff;
/* Some BIOS use weird encodings not in the AGPv3 table. */
if (apsize & 0xff)
apsize |= 0xf00;
- int nbits = hweight16(apsize);
+ nbits = hweight16(apsize);
*order = 7 - nbits;
if ((int)*order < 0) /* < 32MB */
*order = 0;
- u32 aper_low = read_pci_config(num,slot,func, 0x10);
- u32 aper_hi = read_pci_config(num,slot,func,0x14);
- u64 aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32);
+ aper_low = read_pci_config(num,slot,func, 0x10);
+ aper_hi = read_pci_config(num,slot,func,0x14);
+ aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32);
printk("Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n",
aper, 32 << *order, apsizereg);
for (slot = 0; slot < 32; slot++) {
for (func = 0; func < 8; func++) {
u32 class, cap;
+ u8 type;
class = read_pci_config(num,slot,func,
PCI_CLASS_REVISION);
if (class == 0xffffffff)
}
/* No multi-function device? */
- u8 type = read_pci_config_byte(num,slot,func,
+ type = read_pci_config_byte(num,slot,func,
PCI_HEADER_TYPE);
if (!(type & 0x80))
break;
void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason)
{
+ int sum, cpu = safe_smp_processor_id();
+
if (nmi_watchdog_disabled)
return;
- int sum, cpu = safe_smp_processor_id();
-
sum = read_pda(apic_timer_irqs);
if (last_irq_sums[cpu] == sum) {
/*
static void free_iommu(unsigned long offset, int size)
{
+ unsigned long flags;
if (size == 1) {
clear_bit(offset, iommu_gart_bitmap);
return;
}
- unsigned long flags;
spin_lock_irqsave(&iommu_bitmap_lock, flags);
__clear_bit_string(iommu_gart_bitmap, offset, size);
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
{
unsigned long npages = to_pages(phys_mem, size);
unsigned long iommu_page = alloc_iommu(npages);
+ int i;
if (iommu_page == -1) {
if (!nonforced_iommu(dev, phys_mem, size))
return phys_mem;
return bad_dma_address;
}
- int i;
for (i = 0; i < npages; i++) {
iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem);
SET_LEAK(iommu_page + i);
struct scatterlist *sout, unsigned long pages)
{
unsigned long iommu_start = alloc_iommu(pages);
- if (iommu_start == -1)
- return -1;
-
unsigned long iommu_page = iommu_start;
int i;
+
+ if (iommu_start == -1)
+ return -1;
for (i = start; i < stopat; i++) {
struct scatterlist *s = &sg[i];
{
unsigned long iommu_page;
int npages;
+ int i;
if (dma_addr < iommu_bus_base + EMERGENCY_PAGES*PAGE_SIZE ||
dma_addr > iommu_bus_base + iommu_size)
return;
iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT;
npages = to_pages(dma_addr, size);
- int i;
for (i = 0; i < npages; i++) {
iommu_gatt_base[iommu_page + i] = 0;
CLEAR_LEAK(iommu_page + i);
.quad 0
loop2:
.quad 0
- .previous
\ No newline at end of file
+ .previous
}
count >>= 1; /* nr of 32-bit words.. */
if (count) {
+ unsigned long zero;
+ unsigned count64;
if (4 & (unsigned long) buff) {
result += *(unsigned int *) buff;
count--;
count >>= 1; /* nr of 64-bit words.. */
/* main loop using 64byte blocks */
- unsigned long zero = 0;
- unsigned count64 = count >> 3;
+ zero = 0;
+ count64 = count >> 3;
while (count64) {
asm("addq 0*8(%[src]),%[res]\n\t"
"adcq 1*8(%[src]),%[res]\n\t"
void dump_pagetable(unsigned long address)
{
pml4_t *pml4;
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+
asm("movq %%cr3,%0" : "=r" (pml4));
pml4 = __va((unsigned long)pml4 & PHYSICAL_PAGE_MASK);
if (bad_address(pml4)) goto bad;
if (!pml4_present(*pml4)) goto ret;
- pgd_t *pgd = __pgd_offset_k((pgd_t *)pml4_page(*pml4), address);
+ pgd = __pgd_offset_k((pgd_t *)pml4_page(*pml4), address);
if (bad_address(pgd)) goto bad;
printk("PGD %lx ", pgd_val(*pgd));
if (!pgd_present(*pgd)) goto ret;
- pmd_t *pmd = pmd_offset(pgd, address);
+ pmd = pmd_offset(pgd, address);
if (bad_address(pmd)) goto bad;
printk("PMD %lx ", pmd_val(*pmd));
if (!pmd_present(*pmd)) goto ret;
- pte_t *pte = pte_offset_kernel(pmd, address);
+ pte = pte_offset_kernel(pmd, address);
if (bad_address(pte)) goto bad;
printk("PTE %lx", pte_val(*pte));
ret:
#define Dprintk(x...)
-extern char _stext;
+extern char _stext[];
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
/* References to section boundaries */
-extern char _text, _etext, _edata, __bss_start, _end;
+extern char _text, _etext, _edata, __bss_start, _end[];
extern char __init_begin, __init_end;
int after_bootmem;
kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
VMALLOC_END-VMALLOC_START);
- kclist_add(&kcore_kernel, &_stext, &_end - &_stext);
+ kclist_add(&kcore_kernel, &_stext, _end - _stext);
kclist_add(&kcore_modules, (void *)MODULES_VADDR, MODULES_LEN);
kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
VSYSCALL_END - VSYSCALL_START);
extern void enable_lapic_nmi_watchdog(void);
extern void disable_timer_nmi_watchdog(void);
extern void enable_timer_nmi_watchdog(void);
-extern inline void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
+extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
extern int APIC_init_uniprocessor (void);
extern void disable_APIC_timer(void);
extern void enable_APIC_timer(void);
#ifndef __ASSEMBLY__
extern u8 irq_vector[NR_IRQ_VECTORS];
-#define IO_APIC_VECTOR(irq) ((int)irq_vector[irq])
+#define IO_APIC_VECTOR(irq) (irq_vector[irq])
/*
* Various low-level irq details needed by irq.c, process.c,
{
unsigned long rip;
extern unsigned long prof_cpu_mask;
- extern char _stext;
+ extern char _stext[];
profile_hook(regs);