return 0;
}
-static unsigned int __init init_chipset_aec62xx (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
{
int bus_speed = system_bus_clock();
return dev->irq;
}
-static void __init init_hwif_aec62xx (ide_hwif_t *hwif)
+static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
{
hwif->autodma = 0;
hwif->tuneproc = &aec62xx_tune_drive;
hwif->drives[1].autodma = hwif->autodma;
}
-static void __init init_dma_aec62xx (ide_hwif_t *hwif, unsigned long dmabase)
+static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase)
{
struct pci_dev *dev = hwif->pci_dev;
ide_setup_dma(hwif, dmabase, 8);
}
-static void __init init_setup_aec62xx (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_aec6x80 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
{
unsigned long bar4reg = pci_resource_start(dev, 4);
return (dma_stat & 7) != 4;
}
-static unsigned int __init init_chipset_cmd64x (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const char *name)
{
u32 class_rev = 0;
u8 mrdmode = 0;
return 0;
}
-static unsigned int __init ata66_cmd64x (ide_hwif_t *hwif)
+static unsigned int __devinit ata66_cmd64x(ide_hwif_t *hwif)
{
u8 ata66 = 0, mask = (hwif->channel) ? 0x02 : 0x01;
return (ata66 & mask) ? 1 : 0;
}
-static void __init init_hwif_cmd64x (ide_hwif_t *hwif)
+static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
{
struct pci_dev *dev = hwif->pci_dev;
unsigned int class_rev;
*/
#define HPT34X_PCI_INIT_REG 0x80
-static unsigned int __init init_chipset_hpt34x (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const char *name)
{
int i = 0;
unsigned long hpt34xIoBase = pci_resource_start(dev, 4);
return dev->irq;
}
-static void __init init_hwif_hpt34x (ide_hwif_t *hwif)
+static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
{
u16 pcicmd = 0;
return 0;
}
-static int __init init_hpt37x(struct pci_dev *dev)
+static int __devinit init_hpt37x(struct pci_dev *dev)
{
int adjust, i;
u16 freq;
return 0;
}
-static int __init init_hpt366 (struct pci_dev *dev)
+static int __devinit init_hpt366(struct pci_dev *dev)
{
u32 reg1 = 0;
u8 drive_fast = 0;
return 0;
}
-static unsigned int __init init_chipset_hpt366 (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name)
{
int ret = 0;
u8 test = 0;
return dev->irq;
}
-static void __init init_hwif_hpt366 (ide_hwif_t *hwif)
+static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
{
struct pci_dev *dev = hwif->pci_dev;
u8 ata66 = 0, regmask = (hwif->channel) ? 0x01 : 0x02;
hwif->drives[1].autodma = hwif->autodma;
}
-static void __init init_dma_hpt366 (ide_hwif_t *hwif, unsigned long dmabase)
+static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
{
u8 masterdma = 0, slavedma = 0;
u8 dma_new = 0, dma_old = 0;
ide_setup_dma(hwif, dmabase, 8);
}
-static void __init init_setup_hpt374 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d)
{
struct pci_dev *findev = NULL;
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_hpt37x (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_hpt37x(struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_hpt366 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
{
struct pci_dev *findev = NULL;
u8 pin1 = 0, pin2 = 0;
}
#endif /* CONFIG_PPC_PMAC */
-static unsigned int __init init_chipset_pdcnew (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const char *name)
{
if (dev->resource[PCI_ROM_RESOURCE].start) {
pci_write_config_dword(dev, PCI_ROM_ADDRESS,
return dev->irq;
}
-static void __init init_hwif_pdc202new (ide_hwif_t *hwif)
+static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
{
hwif->autodma = 0;
#endif /* PDC202_DEBUG_CABLE */
}
-static void __init init_setup_pdcnew (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_pdc20270 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *d)
{
struct pci_dev *findev = NULL;
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_pdc20276 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d)
{
if ((dev->bus->self) &&
(dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
return 0;
}
-static unsigned int __init init_chipset_pdc202xx (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name)
{
if (dev->resource[PCI_ROM_RESOURCE].start) {
pci_write_config_dword(dev, PCI_ROM_ADDRESS,
return dev->irq;
}
-static void __init init_hwif_pdc202xx (ide_hwif_t *hwif)
+static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
{
hwif->autodma = 0;
hwif->tuneproc = &config_chipset_for_pio;
#endif /* PDC202_DEBUG_CABLE */
}
-static void __init init_dma_pdc202xx (ide_hwif_t *hwif, unsigned long dmabase)
+static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
{
u8 udma_speed_flag = 0, primary_mode = 0, secondary_mode = 0;
ide_setup_dma(hwif, dmabase, 8);
}
-static void __init init_setup_pdc202ata4 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d)
{
if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) {
u8 irq = 0, irq2 = 0;
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_pdc20265 (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdc20265(struct pci_dev *dev, ide_pci_device_t *d)
{
if ((dev->bus->self) &&
(dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
ide_setup_pci_device(dev, d);
}
-static void __init init_setup_pdc202xx (struct pci_dev *dev, ide_pci_device_t *d)
+static void __devinit init_setup_pdc202xx(struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
* Set up the ide_hwif_t for the PIIX interface according to the
* capabilities of the hardware.
*/
-
-static void __init init_hwif_piix (ide_hwif_t *hwif)
+
+static void __devinit init_hwif_piix(ide_hwif_t *hwif)
{
u8 reg54h = 0, reg55h = 0, ata66 = 0;
u8 mask = hwif->channel ? 0xc0 : 0x30;
* Enable the xp fixup for the PIIX controller and then perform
* a standard ide PCI setup
*/
-
-static void __init init_setup_piix (struct pci_dev *dev, ide_pci_device_t *d)
+
+static void __devinit init_setup_piix(struct pci_dev *dev, ide_pci_device_t *d)
{
ide_setup_pci_device(dev, d);
}
* Check for the present of 450NX errata #19 and errata #25. If
* they are found, disable use of DMA IDE
*/
-
-static void __init piix_check_450nx(void)
+
+static void __devinit piix_check_450nx(void)
{
struct pci_dev *pdev = NULL;
u16 cfg;
* to 133MHz clocking if the system isn't already set up to do it.
*/
-static unsigned int __init init_chipset_siimage (struct pci_dev *dev, const char *name)
+static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name)
{
u32 class_rev = 0;
u8 tmpbyte = 0;
* The hardware supports buffered taskfiles and also some rather nice
* extended PRD tables. Unfortunately right now we don't.
*/
-
-static void __init init_mmio_iops_siimage (ide_hwif_t *hwif)
+
+static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
{
struct pci_dev *dev = hwif->pci_dev;
void *addr = pci_get_drvdata(dev);
* look in we get for setting up the hwif so that we
* can get the iops right before using them.
*/
-
-static void __init init_iops_siimage (ide_hwif_t *hwif)
+
+static void __devinit init_iops_siimage(ide_hwif_t *hwif)
{
struct pci_dev *dev = hwif->pci_dev;
u32 class_rev = 0;
* Check for the presence of an ATA66 capable cable on the
* interface.
*/
-
-static unsigned int __init ata66_siimage (ide_hwif_t *hwif)
+
+static unsigned int __devinit ata66_siimage(ide_hwif_t *hwif)
{
unsigned long addr = siimage_selreg(hwif, 0);
if (pci_get_drvdata(hwif->pci_dev) == NULL) {
* requires several custom handlers so we override the default
* ide DMA handlers appropriately
*/
-
-static void __init init_hwif_siimage (ide_hwif_t *hwif)
+
+static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
{
hwif->autodma = 0;
/*
* Invoked from ide-dma.c at boot time.
*/
-void __init init_hwif_trm290 (ide_hwif_t *hwif)
+void __devinit init_hwif_trm290(ide_hwif_t *hwif)
{
unsigned int cfgbase = 0;
unsigned long flags;