- Use definitions where possible.
- Fix various errors in comments.
- Fix missing max_pfn initialisation.
- Add missing device.h and errno.h include files.
- Ensure thread->flags is unsigned long for bitops.
*/
#include <linux/config.h>
+#include <asm/mach-types.h>
#ifndef CONFIG_ARCH_L7200
#error What am I doing here...
ble 1b
mov r8, #0 @ Zero it out
- mov r7, #19 @ Set architecture ID
+ mov r7, #MACH_TYPE_L7200 @ Set architecture ID
add r6, r6, r2, lsr #3
add r6, r6, r6, lsr #8
add r6, r6, r6, lsr #4
- and r6, r6, #15 @ r7 = no. of registers to transfer.
- and r5, r8, #15 << 16 @ Extract 'n' form instruction
+ and r6, r6, #15 @ r6 = no. of registers to transfer.
+ and r5, r8, #15 << 16 @ Extract 'n' from instruction
ldr r7, [sp, r5, lsr #14] @ Get register 'Rn'
tst r8, #1 << 23 @ Check U bit
subne r7, r7, r6, lsl #2 @ Undo increment
int do_translation_fault(unsigned long addr, int error_code, struct pt_regs *regs)
{
struct task_struct *tsk;
- struct mm_struct *mm;
- int offset;
+ unsigned int offset;
pgd_t *pgd, *pgd_k;
pmd_t *pmd, *pmd_k;
offset = __pgd_offset(addr);
+ /*
+ * FIXME: CP15 C1 is write only on ARMv3 architectures.
+ */
pgd = cpu_get_pgd() + offset;
pgd_k = init_mm.pgd + offset;
if (pgd_none(*pgd_k))
goto bad_area;
-#if 0 /* note that we are two-level */
if (!pgd_present(*pgd))
set_pgd(pgd, *pgd_k);
-#endif
pmd_k = pmd_offset(pgd_k, addr);
pmd = pmd_offset(pgd, addr);
bad_area:
tsk = current;
- mm = tsk->active_mm;
- do_bad_area(tsk, mm, addr, error_code, regs);
+ do_bad_area(tsk, tsk->active_mm, addr, error_code, regs);
return 0;
}
* also get rid of some of the stuff above as well.
*/
max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
+ max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
mi->end = memend_pfn << PAGE_SHIFT;
return bootmem_pages;
# To add an entry into this database, please see Documentation/arm/README,
# or contact rmk@arm.linux.org.uk
#
-# Last update: Fri Mar 29 15:51:20 2002
+# Last update: Tue May 21 14:19:05 2002
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
blue_v1 ARCH_BLUE_V1 BLUE_V1 138
pxa_cerf ARCH_PXA_CERF PXA_CERF 139
arm7tevb ARCH_ARM7TEVB ARM7TEVB 140
-d7400 ARCH_D7400 D7400 141
+d7400 SA1100_D7400 D7400 141
piranha ARCH_PIRANHA PIRANHA 142
sbcamelot SA1100_SBCAMELOT SBCAMELOT 143
kings SA1100_KINGS KINGS 144
iq80321 ARCH_IQ80321 IQ80321 169
wid SA1100_WID WID 170
sabinal ARCH_SABINAL SABINAL 171
+ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172
+miniprint SA1100_MINIPRINT MINIPRINT 173
+adm510x ARCH_ADM510X ADM510X 174
+svs200 SA1100_SVS200 SVS200 175
+atg_tcu ARCH_ATG_TCU ATG_TCU 176
+jornada820 SA1100_JORNADA820 JORNADA820 177
+s3c44b0 ARCH_S3C44B0 S3C44B0 178
+margis2 ARCH_MARGIS2 MARGIS2 179
+ks8695 ARCH_KS8695 KS8695 180
+brh ARCH_BRH BRH 181
+s3c2410 ARCH_S3C2410 S3C2410 182
+possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183
#include <linux/ptrace.h>
#include <linux/interrupt.h>
#include <linux/init.h>
+#include <linux/errno.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/errno.h>
#include <linux/init.h>
#include <asm/hardware.h>
* "Expansion Memory (PCMCIA) Configuration Register (MECR)"
* that's section 10.2.5 in _my_ version of the manuial ;)
*/
-static int sa1100_pcmcia_default_mecr_timing(unsigned int sock, unsigned int cpu_speed,
- unsigned int cmd_time )
+static unsigned int
+sa1100_pcmcia_default_mecr_timing(unsigned int sock, unsigned int cpu_speed,
+ unsigned int cmd_time)
{
- return sa1100_pcmcia_mecr_bs( cmd_time, cpu_speed );
+ return sa1100_pcmcia_mecr_bs(cmd_time, cpu_speed);
}
/* sa1100_pcmcia_set_mecr()
* Call board specific BS value calculation to allow boards
* to tweak the BS values.
*/
-static int sa1100_pcmcia_set_mecr( int sock )
+static int sa1100_pcmcia_set_mecr(int sock)
{
struct sa1100_pcmcia_socket *skt;
u32 mecr;
long flags;
unsigned int bs;
- if ( sock<0 || sock>SA1100_PCMCIA_MAX_SOCK )
+ if (sock < 0 || sock > SA1100_PCMCIA_MAX_SOCK)
return -1;
- skt = PCMCIA_SOCKET( sock );
+ skt = PCMCIA_SOCKET(sock);
local_irq_save(flags);
clock = cpufreq_get(0);
- bs = pcmcia_low_level->socket_get_timing( sock, clock, skt->speed_io);
+ bs = pcmcia_low_level->socket_get_timing(sock, clock, skt->speed_io);
mecr = MECR;
MECR_FAST_SET(mecr, sock, 0);
local_irq_restore(flags);
- DEBUG(4, "%s(): FAST%u %lx BSM%u %lx BSA%u %lx BSIO%u %lx\n",
- __FUNCTION__, sock, MECR_FAST_GET(mecr, sock), sock,
- MECR_BSM_GET(mecr, sock), sock, MECR_BSA_GET(mecr, sock),
- sock, MECR_BSIO_GET(mecr, sock));
+ DEBUG(4, "%s(): FAST%u %lx BSM%u %lx BSA%u %lx BSIO%u %lx\n",
+ __FUNCTION__, sock, MECR_FAST_GET(mecr, sock), sock,
+ MECR_BSM_GET(mecr, sock), sock, MECR_BSA_GET(mecr, sock),
+ sock, MECR_BSIO_GET(mecr, sock));
return 0;
}
*/
static void sa1100_pcmcia_update_mecr(unsigned int clock)
{
- unsigned int sock;
+ unsigned int sock;
- for (sock = 0; sock < SA1100_PCMCIA_MAX_SOCK; ++sock) {
- sa1100_pcmcia_set_mecr( sock );
- }
+ for (sock = 0; sock < SA1100_PCMCIA_MAX_SOCK; ++sock) {
+ sa1100_pcmcia_set_mecr(sock);
+ }
}
/* sa1100_pcmcia_notifier()
/*
* Calculate MECR timing clock wait states
*/
- int (*socket_get_timing)(unsigned int sock, unsigned int cpu_speed,
- unsigned int cmd_time );
+ unsigned int (*socket_get_timing)(unsigned int sock,
+ unsigned int cpu_speed, unsigned int cmd_time);
};
extern int sa1100_register_pcmcia(struct pcmcia_low_level *);
*/
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/device.h>
+#include <linux/errno.h>
#include <linux/init.h>
#include <asm/hardware.h>
{
int ret = -ENODEV;
- if (machine_is_assabet() && machine_has_neponset())
+ if (machine_is_assabet() && sa1111)
ret = sa1100_register_pcmcia(&neponset_pcmcia_ops);
return ret;
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/ioport.h>
+#include <linux/device.h>
#include <asm/hardware.h>
#include <asm/hardware/sa1111.h>
* low level task data that entry.S needs immediate access to.
*/
struct thread_info {
- __u32 flags; /* low level flags */
+ unsigned long flags; /* low level flags */
__s32 preempt_count; /* 0 => preemptable, <0 => bug */
mm_segment_t addr_limit; /* address limit */
__u32 cpu; /* cpu */