[ARM PATCH] 2423/2: more PXA2xx AC97 defines

Patch from Nicolas Pitre

Signed-off-by: Nicolas Pitre
Signed-off-by: Russell King

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index e201bdc157fc992fd588d8cbb59c1adf2abcf980..94e1f38f7eee743af609566bae02c5671031c3a6 100644 (file)
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -498,14 +498,18 @@
 
 #define POCR           __REG(0x40500000)  /* PCM Out Control Register */
 #define POCR_FEIE      (1 << 3)        /* FIFO Error Interrupt Enable */
+#define POCR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define PICR           __REG(0x40500004)  /* PCM In Control Register */
 #define PICR_FEIE      (1 << 3)        /* FIFO Error Interrupt Enable */
+#define PICR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define MCCR           __REG(0x40500008)  /* Mic In Control Register */
 #define MCCR_FEIE      (1 << 3)        /* FIFO Error Interrupt Enable */
+#define MCCR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define GCR            __REG(0x4050000C)  /* Global Control Register */
+#define GCR_nDMAEN     (1 << 24)       /* non DMA Enable */
 #define GCR_CDONE_IE   (1 << 19)       /* Command Done Interrupt Enable */
 #define GCR_SDONE_IE   (1 << 18)       /* Status Done Interrupt Enable */
 #define GCR_SECRDY_IEN (1 << 9)        /* Secondary Ready Interrupt Enable */
@@ -519,12 +523,17 @@
 
 #define POSR           __REG(0x40500010)  /* PCM Out Status Register */
 #define POSR_FIFOE     (1 << 4)        /* FIFO error */
+#define POSR_FSR       (1 << 2)        /* FIFO Service Request */
 
 #define PISR           __REG(0x40500014)  /* PCM In Status Register */
 #define PISR_FIFOE     (1 << 4)        /* FIFO error */
+#define PISR_EOC       (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define PISR_FSR       (1 << 2)        /* FIFO Service Request */
 
 #define MCSR           __REG(0x40500018)  /* Mic In Status Register */
 #define MCSR_FIFOE     (1 << 4)        /* FIFO error */
+#define MCSR_EOC       (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MCSR_FSR       (1 << 2)        /* FIFO Service Request */
 
 #define GSR            __REG(0x4050001C)  /* Global Status Register */
 #define GSR_CDONE      (1 << 19)       /* Command Done */
@@ -537,9 +546,10 @@
 #define GSR_PRIRES     (1 << 10)       /* Primary Resume Interrupt */
 #define GSR_SCR                (1 << 9)        /* Secondary Codec Ready */
 #define GSR_PCR                (1 << 8)        /*  Primary Codec Ready */
-#define GSR_MINT       (1 << 7)        /* Mic In Interrupt */
+#define GSR_MCINT      (1 << 7)        /* Mic In Interrupt */
 #define GSR_POINT      (1 << 6)        /* PCM Out Interrupt */
 #define GSR_PIINT      (1 << 5)        /* PCM In Interrupt */
+#define GSR_ACOFFD     (1 << 3)        /* AC-link Shut Off Done */
 #define GSR_MOINT      (1 << 2)        /* Modem Out Interrupt */
 #define GSR_MIINT      (1 << 1)        /* Modem In Interrupt */
 #define GSR_GSCI       (1 << 0)        /* Codec GPI Status Change Interrupt */
@@ -552,15 +562,20 @@
 
 #define MOCR           __REG(0x40500100)  /* Modem Out Control Register */
 #define MOCR_FEIE      (1 << 3)        /* FIFO Error */
+#define MOCR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define MICR           __REG(0x40500108)  /* Modem In Control Register */
 #define MICR_FEIE      (1 << 3)        /* FIFO Error */
+#define MICR_FSRIE     (1 << 1)        /* FIFO Service Request Interrupt Enable */
 
 #define MOSR           __REG(0x40500110)  /* Modem Out Status Register */
 #define MOSR_FIFOE     (1 << 4)        /* FIFO error */
+#define MOSR_FSR       (1 << 2)        /* FIFO Service Request */
 
 #define MISR           __REG(0x40500118)  /* Modem In Status Register */
 #define MISR_FIFOE     (1 << 4)        /* FIFO error */
+#define MISR_EOC       (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MISR_FSR       (1 << 2)        /* FIFO Service Request */
 
 #define MODR           __REG(0x40500140)  /* Modem FIFO Data Register */