}
/* Run TX completion thread */
+ spin_lock(&gp->tx_lock);
gem_tx(dev, gp, gp->status);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irqrestore(&gp->lock, flags);
readl(gp->regs + MAC_RXCFG));
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gp->reset_task_pending = 2;
schedule_work(&gp->reset_task);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
}
(csum_stuff_off << 21));
}
- spin_lock_irq(&gp->lock);
+ spin_lock_irq(&gp->tx_lock);
/* This is a hard error, log it. */
if (TX_BUFFS_AVAIL(gp) <= (skb_shinfo(skb)->nr_frags + 1)) {
netif_stop_queue(dev);
- spin_unlock_irq(&gp->lock);
+ spin_unlock_irq(&gp->tx_lock);
printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
dev->name);
return 1;
dev->name, entry, skb->len);
mb();
writel(gp->tx_new, gp->regs + TXDMA_KICK);
- spin_unlock_irq(&gp->lock);
+ spin_unlock_irq(&gp->tx_lock);
dev->trans_start = jiffies;
}
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
dev->mtu = new_mtu;
gp->reset_task_pending = 1;
schedule_work(&gp->reset_task);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
flush_scheduled_work();
#define STOP_TRIES 32
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_stop(struct gem *gp)
{
int limit;
printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name);
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_start_dma(struct gem *gp)
{
unsigned long val;
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
// XXX dbl check what that function should do when called on PCS PHY
static void gem_begin_auto_negotiation(struct gem *gp, struct ethtool_cmd *ep)
{
/* A link-up condition has occurred, initialize and enable the
* rest of the chip.
*
- * Must be invoked under gp->lock.
+ * Must be invoked under gp->lock and gp->tx_lock.
*/
static int gem_set_link_modes(struct gem *gp)
{
return 0;
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static int gem_mdio_link_not_up(struct gem *gp)
{
switch (gp->lstate) {
netif_poll_disable(gp->dev);
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
if (gp->hw_running && gp->opened) {
netif_stop_queue(gp->dev);
}
gp->reset_task_pending = 0;
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
netif_poll_enable(gp->dev);
}
return;
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
/* If the link of task is still pending, we just
* reschedule the link timer
restart:
mod_timer(&gp->link_timer, jiffies + ((12 * HZ) / 10));
out_unlock:
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_clean_rings(struct gem *gp)
{
struct gem_init_block *gb = gp->init_block;
}
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_rings(struct gem *gp)
{
struct gem_init_block *gb = gp->init_block;
wmb();
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_phy(struct gem *gp)
{
u32 mifcfg;
}
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_dma(struct gem *gp)
{
u64 desc_dma = (u64) gp->gblock_dvma;
gp->regs + RXDMA_BLANK);
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static u32
gem_setup_multicast(struct gem *gp)
{
return rxcfg;
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_mac(struct gem *gp)
{
unsigned char *e = &gp->dev->dev_addr[0];
writel(0xffffffff, gp->regs + MAC_MCMASK);
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_pause_thresholds(struct gem *gp)
{
u32 cfg;
return 0;
}
-/* Must be invoked under gp->lock. */
+/* Must be invoked under gp->lock and gp->tx_lock. */
static void gem_init_hw(struct gem *gp, int restart_link)
{
/* On Apple's gmac, I initialize the PHY only after
if (!gp->wake_on_lan) {
spin_lock_irqsave(&gp->lock, flags);
+ spin_lock(&gp->tx_lock);
gem_stop(gp);
writel(MAC_TXRST_CMD, gp->regs + MAC_TXRST);
writel(MAC_RXRST_CMD, gp->regs + MAC_RXRST);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irqrestore(&gp->lock, flags);
}
unsigned long flags;
spin_lock_irqsave(&gp->lock, flags);
+ spin_lock(&gp->tx_lock);
gem_stop(gp);
- spin_unlock_irqrestore(&gp->lock, flags);
+ spin_unlock(&gp->tx_lock);
+ spin_unlock_irqrestore(&gp->lock, flags);
}
}
/* Reset the chip */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gem_stop(gp);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
gp->hw_running = 1;
printk(KERN_ERR "%s: failed to request irq !\n", gp->dev->name);
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
#ifdef CONFIG_PPC_PMAC
if (!hw_was_up && gp->pdev->vendor == PCI_VENDOR_ID_APPLE)
gem_apple_powerdown(gp);
gp->pm_timer.expires = jiffies + 10*HZ;
add_timer(&gp->pm_timer);
up(&gp->pm_sem);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
return -EAGAIN;
}
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
/* Allocate & setup ring buffers */
gem_init_rings(gp);
gp->opened = 1;
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
up(&gp->pm_sem);
/* Stop traffic, mark us closed */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gp->opened = 0;
/* Bye, the pm timer will finish the job */
free_irq(gp->pdev->irq, (void *) dev);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
/* Fire the PM timer that will shut us down in about 10 seconds */
/* If the driver is opened, we stop the DMA */
if (gp->opened) {
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
/* Stop traffic, mark us closed */
netif_device_detach(dev);
/* Get rid of ring buffers */
gem_clean_rings(gp);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE)
}
#endif /* CONFIG_PPC_PMAC */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gem_stop(gp);
gp->hw_running = 1;
gem_init_rings(gp);
gem_init_hw(gp, 1);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
netif_device_attach(dev);
struct net_device_stats *stats = &gp->net_stats;
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
if (gp->hw_running) {
stats->rx_crc_errors += readl(gp->regs + MAC_FCSERR);
writel(0, gp->regs + MAC_LCOLL);
}
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
return &gp->net_stats;
return;
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
netif_stop_queue(dev);
netif_wake_queue(dev);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
}
/* Return current PHY settings */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
cmd->autoneg = gp->want_autoneg;
cmd->speed = gp->phy_mii.speed;
cmd->duplex = gp->phy_mii.duplex;
*/
if (cmd->advertising == 0)
cmd->advertising = cmd->supported;
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
} else { // XXX PCS ?
cmd->supported =
/* Apply settings and restart link process. */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gem_begin_auto_negotiation(gp, cmd);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
return 0;
/* Restart link process. */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gem_begin_auto_negotiation(gp, NULL);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
return 0;
gp->msg_enable = DEFAULT_MSG;
spin_lock_init(&gp->lock);
+ spin_lock_init(&gp->tx_lock);
init_MUTEX(&gp->pm_sem);
init_timer(&gp->link_timer);
gem_apple_powerup(gp);
#endif
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gem_stop(gp);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
/* Fill up the mii_phy structure (even if we won't use it) */
/* Detect & init PHY, start autoneg */
spin_lock_irq(&gp->lock);
+ spin_lock(&gp->tx_lock);
gp->hw_running = 1;
gem_init_phy(gp);
gem_begin_auto_negotiation(gp, NULL);
+ spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
if (gp->phy_type == phy_mii_mdio0 ||
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