drm/amd/display: handle range offsets in VRR ranges

commit 937844d661354bf142dc1c621396fdab10ecbacc upstream.

Need to check the offset bits for values greater than 255.

v2: also update amdgpu_dm_connector values.

Suggested-by: Mano Ségransan <mano.segransan@protonmail.com>
Tested-by: Mano Ségransan <mano.segransan@protonmail.com>
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3203
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4086ffdc2fcc9309b4f3a5bc3b4db8bc3e784ddc..90f03d274990e54ff222e49c07b45d4bfb4311ea 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -10876,14 +10876,23 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
                                if (range->flags != 1)
                                        continue;
 
-                               amdgpu_dm_connector->min_vfreq = range->min_vfreq;
-                               amdgpu_dm_connector->max_vfreq = range->max_vfreq;
-                               amdgpu_dm_connector->pixel_clock_mhz =
-                                       range->pixel_clock_mhz * 10;
-
                                connector->display_info.monitor_range.min_vfreq = range->min_vfreq;
                                connector->display_info.monitor_range.max_vfreq = range->max_vfreq;
 
+                               if (edid->revision >= 4) {
+                                       if (data->pad2 & DRM_EDID_RANGE_OFFSET_MIN_VFREQ)
+                                               connector->display_info.monitor_range.min_vfreq += 255;
+                                       if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ)
+                                               connector->display_info.monitor_range.max_vfreq += 255;
+                               }
+
+                               amdgpu_dm_connector->min_vfreq =
+                                       connector->display_info.monitor_range.min_vfreq;
+                               amdgpu_dm_connector->max_vfreq =
+                                       connector->display_info.monitor_range.max_vfreq;
+                               amdgpu_dm_connector->pixel_clock_mhz =
+                                       range->pixel_clock_mhz * 10;
+
                                break;
                        }