[ARM PATCH] 1741/1: Add ARM710T processor functions

Patch from Tony Lindgren

Following patch adds ARM710T processor support to proc-arm720.S.

The preferred way to add support was discussed on the Linux-arm-kernel
mailing list in December, with a link to the thread here:

http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2003-October/017596.html

NEC ARM710T is used in Psion Windermere architecture, and possibly
other systems.

710T works fine with the 720T functions, except the high_mapping
does not work for vectors_base(). Even if the high bit register is
set, the vectors stay at 0x00000000 instead of 0xffff0000.

diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 19e80287f727960cc61197acf92debd0c2efd18f..3bddde053bf005ff821490477d86448045ed0980 100644 (file)
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -126,6 +126,21 @@ ENTRY(cpu_arm720_reset)
 
                __INIT
 
+               .type   __arm710_setup, #function
+__arm710_setup:        mov     r0, #0
+               mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
+               mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
+               mcr     p15, 0, r4, c2, c0              @ load page table pointer
+               mov     r0, #0x1f                       @ Domains 0, 1 = client
+               mcr     p15, 0, r0, c3, c0              @ load domain access register
+
+               mrc     p15, 0, r0, c1, c0              @ get control register
+               bic     r0, r0, #0x0e00                 @ ..V. ..RS BLDP WCAM
+               orr     r0, r0, #0x0100                 @ .... .... .111 .... (old)
+               orr     r0, r0, #0x003d                 @ .... ..01 ..11 1101 (new)
+               mov     pc, lr                          @ __ret (head-armv.S)
+               .size   __arm710_setup, . - __arm710_setup
+
                .type   __arm720_setup, #function
 __arm720_setup:        mov     r0, #0
                mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
@@ -169,6 +184,11 @@ cpu_arch_name:     .asciz  "armv4t"
 cpu_elf_name:  .asciz  "v4"
                .size   cpu_elf_name, . - cpu_elf_name
 
+               .type   cpu_arm710_name, #object
+cpu_arm710_name:
+               .asciz  "ARM710T"
+               .size   cpu_arm710_name, . - cpu_arm710_name
+
                .type   cpu_arm720_name, #object
 cpu_arm720_name:
                .asciz  "ARM720T"
@@ -182,6 +202,22 @@ cpu_arm720_name:
        
                .section ".proc.info", #alloc, #execinstr
 
+               .type   __arm710_proc_info, #object
+__arm710_proc_info:
+               .long   0x41807100                              @ cpu_val
+               .long   0xffffff00                              @ cpu_mask
+               .long   0x00000c1e                              @ section_mmu_flags
+               b       __arm710_setup                          @ cpu_flush
+               .long   cpu_arch_name                           @ arch_name
+               .long   cpu_elf_name                            @ elf_name
+               .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
+               .long   cpu_arm710_name                         @ name
+               .long   arm720_processor_functions
+               .long   v4_tlb_fns
+               .long   v4wt_user_fns
+               .long   v4_cache_fns
+               .size   __arm710_proc_info, . - __arm710_proc_info
+
                .type   __arm720_proc_info, #object
 __arm720_proc_info:
                .long   0x41807200                              @ cpu_val