From: Michal Wajdeczko Date: Mon, 22 Jun 2026 13:23:38 +0000 (+0200) Subject: drm/xe/mmio: Map MMIO BAR using managed version of pci_iomap X-Git-Url: http://git.hungrycats.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=f8c64537f2db36f1ccaf223c313b5590fd9ba411;p=linux drm/xe/mmio: Map MMIO BAR using managed version of pci_iomap This will allow us to simplify our custom release action where we will keep only zeroing of the xe->mmio.regs as we still rely on it all checks during all xe_mmio operations. While around, add missing kernel-doc for the function and update the error message. Signed-off-by: Michal Wajdeczko Cc: Matthew Auld Reviewed-by: Matthew Auld Link: https://patch.msgid.link/20260622132342.19600-3-michal.wajdeczko@intel.com --- diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index 7e0cefcd16bde..fce890b6410c7 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -16,6 +16,7 @@ #include "regs/xe_bars.h" #include "xe_device.h" #include "xe_gt_sriov_vf.h" +#include "xe_printk.h" #include "xe_sriov.h" #include "xe_tile_printk.h" #include "xe_trace.h" @@ -80,27 +81,30 @@ int xe_mmio_probe_tiles(struct xe_device *xe) static void mmio_fini(void *arg) { struct xe_device *xe = arg; - struct xe_tile *root_tile = xe_device_get_root_tile(xe); - pci_iounmap(to_pci_dev(xe->drm.dev), xe->mmio.regs); xe->mmio.regs = NULL; - root_tile->mmio.regs = NULL; } +/** + * xe_mmio_probe_early() - Probe and initialize device's MMIO + * @xe: the &xe_device + * + * Map the entire GTTMMADR_BAR and initialize the first tile's MMIO instance. + * + * The first 16MB of the GTTMMADR_BAR always belongs to the root tile, and + * includes: registers (0-4MB), reserved space (4MB-8MB) and GGTT (8MB-16MB). + * + * Return: 0 on success or a negative error code on failure. + */ int xe_mmio_probe_early(struct xe_device *xe) { struct xe_tile *root_tile = xe_device_get_root_tile(xe); struct pci_dev *pdev = to_pci_dev(xe->drm.dev); - /* - * Map the entire BAR. - * The first 16MB of the BAR, belong to the root tile, and include: - * registers (0-4MB), reserved space (4MB-8MB) and GGTT (8MB-16MB). - */ xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR); - xe->mmio.regs = pci_iomap(pdev, GTTMMADR_BAR, 0); + xe->mmio.regs = pcim_iomap(pdev, GTTMMADR_BAR, 0); if (!xe->mmio.regs) { - drm_err(&xe->drm, "failed to map registers\n"); + xe_err(xe, "Failed to map GTTMMADR_BAR\n"); return -EIO; }