ASoC: Intel: KMB: Propagate -EPROBE_DEFER from IRQ lookup
Return -EPROBE_DEFER from platform_get_irq_optional() so the driver is
re-probed when the interrupt resource becomes available instead of
continuing probe without an IRQ.
Shenghao Ding [Tue, 11 Aug 2026 12:14:46 +0000 (20:14 +0800)]
ASoC: tas2781: Fix compiling warning for tasdevice_set_capture_profile_id()
Correct the mismatched function description, parameter names and return
value documentation in the comment block. No functional code change, only
comment and documentation update.
Fixes: 431c15610d01 ("ASoC: tas2781: add capture_profile_id field and update the tuning_switch function") Signed-off-by: Shenghao Ding <shenghao-ding@ti.com> Link: https://patch.msgid.link/20260811121446.1805-1-shenghao-ding@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
ASoC: dwc: Propagate -EPROBE_DEFER from IRQ lookup
platform_get_irq_optional() never returns 0. It returns a positive IRQ
number on success or a negative error code on failure.
Return -EPROBE_DEFER from platform_get_irq_optional() so the driver is
re-probed when the interrupt resource becomes available instead of
continuing probe without an IRQ.
Mark Brown [Mon, 10 Aug 2026 14:34:19 +0000 (15:34 +0100)]
ASoC: Use auto-cleanup for firmware loading
Takashi Iwai <tiwai@suse.de> says:
here is a revised series of trivial patches to use the auto-cleanup
(via __free(firmware)) for firmware management.
Now compile warnings due to the mixture with goto have been addressed
for rt1320-sdw and wm2000 drivers. Others remain identical, just took
a few review Acks.
Takashi Iwai [Thu, 6 Aug 2026 14:00:03 +0000 (16:00 +0200)]
ASoC: SOF: Use auto-cleanup for firmware loading
Simplify the code to manage the firmware loading with __free(firmware)
and __free(kfree) auto-cleanups for the firmware data and the temporary
string or array.
Only the code refactoring, no functional changes.
Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Bard Liao <yung-chuan.liao@linux.intel.com> Cc: Daniel Baluta <daniel.baluta@nxp.com> Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.dev> Cc: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260806140006.1412298-32-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
Takashi Iwai [Thu, 6 Aug 2026 13:59:53 +0000 (15:59 +0200)]
ASoC: tlv320aic31xx: Use auto-cleanup for firmware loading
Simplify the code to manage the firmware loading with __free(firmware)
auto-cleanup.
Only the code refactoring, no functional changes.
Cc: Shenghao Ding <shenghao-ding@ti.com> Cc: Kevin Lu <kevin-lu@ti.com> Cc: Baojun Xu <baojun.xu@ti.com> Cc: Sen Wang <sen@ti.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260806140006.1412298-22-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
Takashi Iwai [Thu, 6 Aug 2026 13:59:51 +0000 (15:59 +0200)]
ASoC: tas2781: Use auto-cleanup for firmware loading
Simplify the code to manage the firmware loading with __free(firmware)
auto-cleanup.
Only the code refactoring, no functional changes.
Cc: Shenghao Ding <shenghao-ding@ti.com> Cc: Kevin Lu <kevin-lu@ti.com> Cc: Baojun Xu <baojun.xu@ti.com> Cc: Sen Wang <sen@ti.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260806140006.1412298-20-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
Takashi Iwai [Thu, 6 Aug 2026 13:59:48 +0000 (15:59 +0200)]
ASoC: rt722-sdca: Use auto-cleanup for firmware loading
Simplify the code to manage the firmware loading with __free(firmware)
auto-cleanup, as well as the firmware file name being released with
__free(kfree).
Le Qi [Mon, 10 Aug 2026 03:10:32 +0000 (11:10 +0800)]
ASoC: qcom: sc8280xp: configure codec sysclk for QCS615
Continuous high-amplitude noise could occur in the DA7213 microphone
capture path after a Bluetooth out-of-range/reset event followed by
reconnection. The noise was present in both the raw ALSA capture and
PipeWire input, confirming that it originated before Bluetooth
encoding.
The codec already obtains and enables MCLK through its DT clock and
bias-level handling. However, the machine driver did not explicitly
configure the codec sysclk during hw_params(). Enable
codec_sysclk_set for QCS615 so that the DA7213 clock source and rate
are configured before the codec power-up sequence.
Verified on QCS615 Talos with repeated Bluetooth disconnect and
reconnect cycles. The noise was no longer reproducible.
Shengjiu Wang [Fri, 7 Aug 2026 07:22:02 +0000 (15:22 +0800)]
ASoC: fsl_easrc: fix missing return on success in runtime_resume
Commit 48d84310be60 ("ASoC: fsl_easrc: Use guard() for spin locks")
refactored fsl_easrc_runtime_resume() but accidentally dropped the
early return on the success path. The original code had a skip_load
label followed by "return 0"; that label was removed during cleanup
but the corresponding success return was lost too.
As a result, every successful resume falls through into the
disable_mem_clk error path and calls clk_disable_unprepare() on a
clock that is still in use, leading to an unbalanced clock disable.
Restore the missing "return 0" before the disable_mem_clk error label.
Mark Brown [Fri, 7 Aug 2026 14:57:50 +0000 (15:57 +0100)]
ASoC: codec drivers: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
Affected tables:
ml26124_reg 1 of 79 entries unreachable
cx2072x_reg_defaults 75 of 132 entries unreachable
max9860_reg_defaults 1 of 14 entries unreachable
stih407_sas_reg_defaults 1 of 2 entries unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:11 +0000 (15:28 +0300)]
ASoC: sti-sas: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
STIH407_AUDIO_DAC_CTRL (0xa8) is listed before
STIH407_AUDIO_GLUE_CTRL (0xa4), which makes the latter unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:10 +0000 (15:28 +0300)]
ASoC: max9860: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
MAX9860_PWRMAN (0x10) is listed as the first entry, before
MAX9860_INTEN (0x02), which makes MAX9860_INTEN unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:09 +0000 (15:28 +0300)]
ASoC: cx2072x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The table is grouped by function rather than by address: for every node
the amplifier gain registers (0x41c0, 0x45c0, ...) are listed before the
power state and stream format registers of the same node (0x4014,
0x4414, ...). This leaves 75 of the 132 entries unreachable.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:08 +0000 (15:28 +0300)]
ASoC: ml26124: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The Mic Select Control register (0xe8) is listed in the analog path
control group, between 0x5a and 0x60, which makes it unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Move the entry to the end of the table, where it belongs by address.
Mark Brown [Fri, 7 Aug 2026 14:56:06 +0000 (15:56 +0100)]
ASoC: tegra: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
The series is based on broonie/for-linus (05eebef3c7b2).
Affected tables:
tegra210_i2s_reg_defaults 2 of 8 entries unreachable
tegra264_i2s_reg_defaults 4 of 9 entries unreachable
tegra210_mixer_reg_defaults 1 entry unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:48 +0000 (15:27 +0300)]
ASoC: tegra210_mixer: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA210_MIXER_ENABLE (0x400) is the last entry of the table, after
TEGRA210_MIXER_PEAKM_RAM_CTRL (0x434), which makes it unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:47 +0000 (15:27 +0300)]
ASoC: tegra210_i2s: sort the Tegra264 register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA264_I2S_ENABLE (0x100), TEGRA264_I2S_RX_FIFO_WR_ACCESS_MODE (0x30)
and TEGRA264_I2S_TX_FIFO_RD_ACCESS_MODE (0xb0) are listed at the end of
the table, after TEGRA264_I2S_TIMING (0x130), which leaves 4 of the 9
entries unreachable. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:46 +0000 (15:27 +0300)]
ASoC: tegra210_i2s: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA210_I2S_ENABLE (0x80) is listed after TEGRA210_I2S_CG (0x88) and
TEGRA210_I2S_TIMING (0xa4), so both it and TEGRA210_I2S_TIMING are
unreachable. regcache_reg_needs_sync() then cannot compare them against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Mark Brown [Fri, 7 Aug 2026 14:53:42 +0000 (15:53 +0100)]
ASoC: NXP/Freescale: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
The series is based on broonie/for-linus (05eebef3c7b2).
Affected tables:
sgtl5000_reg_defaults 1 of 35 entries unreachable
fsl_easrc_reg_defaults 3 of 120 entries unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:28 +0000 (15:27 +0300)]
ASoC: fsl_easrc: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The four REG_EASRC_RRL() entries are listed as a block before the four
REG_EASRC_RRH() ones, but the two registers of a context alternate in
the address map (RRL(n) at 0x110 + 8 * n, RRH(n) at 0x114 + 8 * n).
This leaves REG_EASRC_RRL(1), REG_EASRC_RRL(2) and REG_EASRC_RRL(3)
unreachable. regcache_reg_needs_sync() then cannot compare them against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:27 +0000 (15:27 +0300)]
ASoC: sgtl5000: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
SGTL5000_CHIP_SHORT_CTRL (0x003c) is listed before
SGTL5000_CHIP_ANA_TEST2 (0x003a), which makes the former unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Mark Brown [Fri, 7 Aug 2026 14:51:43 +0000 (15:51 +0100)]
ASoC: TI codecs: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
The reg_defaults array of a regmap_config must be sorted by ascending
register address: regcache_lookup_reg() finds entries in it with
bsearch(), and regcache_init() only kmemdup_array()s the array, it never
sorts it. See commit fd80df352ba1 ("regcache: Add support for sorting
defaults arrays").
When the array is not sorted, bsearch() descends into the wrong half and
a number of entries can never be found. regcache_reg_needs_sync() then
cannot compare the cached value against the default and always reports
that a sync is needed, so those registers are written to the device on
every regcache_sync() even if they were never touched.
I found this while chasing a SoundWire NAK on an unimplemented register
and audited the reg_defaults tables in sound/ by replaying lib/bsearch.c
over each of them. These are the affected TI/Burr-Brown codecs:
The patches only reorder the existing entries. The text of every entry
is kept verbatim, no default value is changed, and each resulting table
was verified to be fully reachable.
tas2783-sdw was fixed separately, it had already been posted.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:49 +0000 (13:41 +0300)]
ASoC: tas675x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS675X_AC_LDG_CTRL_REG (0xb5), TAS675X_TWEETER_DETECT_CTRL_REG (0xb6),
TAS675X_TWEETER_DETECT_THRESH_REG (0xb7) and TAS675X_AC_LDG_FREQ_CTRL_REG
(0xb8) are listed before the 0x7c - 0xa0 block, which leaves 14 of the
69 entries unreachable. regcache_reg_needs_sync() then cannot compare
them against their default and reports that a sync is needed, so they
are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:48 +0000 (13:41 +0300)]
ASoC: tas2780: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2780_DVC (0x1a) is listed before TAS2780_CHNL_0 (0x03), which makes
it unreachable. regcache_reg_needs_sync() then cannot compare it
against its default and reports that a sync is needed, so it is written
to the device on every regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:47 +0000 (13:41 +0300)]
ASoC: tas2764: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2764_DVC (0x1a) is listed before TAS2764_CHNL_0 (0x03), which makes
it unreachable. regcache_reg_needs_sync() then cannot compare it
against its default and reports that a sync is needed, so it is written
to the device on every regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:46 +0000 (13:41 +0300)]
ASoC: tas2552: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2552_OUTPUT_DATA (0x07), TAS2552_PDM_CFG (0x11), TAS2552_PGA_GAIN
(0x12) and TAS2552_BOOST_APT_CTRL (0x14) are listed before
TAS2552_RESERVED_0D (0x0d), TAS2552_LIMIT_RATE_HYS (0x0e) and
TAS2552_CFG_2 (0x02), which leaves 7 of the 21 entries unreachable.
regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:45 +0000 (13:41 +0300)]
ASoC: pcm512x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
PCM512x_AUTO_MUTE (page 0, register 59) is listed before
PCM512x_ERROR_DETECT (page 0, register 37) and PCM512x_VCOM_CTRL_2
(page 1, register 9) is listed before the page 0 clocking block, so the
bsearch() descends into the wrong half of the table. 24 of the 45
entries are unreachable, among them every PLL coefficient and clock
divider default. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:13:27 +0000 (12:13 +0300)]
ASoC: tas2783-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
tas2783_reg_default[] is grouped by SDCA entity name instead, so the
binary search does not find 120 of its 196 entries.
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 11:39:11 +0000 (14:39 +0300)]
ASoC: pm4125-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
PM4125_SWR_HPHPA_HD2 (0x3090) is listed before
PM4125_ANA_HPHPA_SPARE_CTL (0x308e), which makes the latter unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Mark Brown [Fri, 7 Aug 2026 14:45:39 +0000 (15:45 +0100)]
ASoC: Realtek codecs: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address as
regcache_lookup_reg() locates the entries in it with bsearch(), see commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
These tables have entries which are out of order, so the binary search does
not find part of them. For those registers regcache_reg_needs_sync()
cannot compare the cached value against the default and reports that a sync
is needed, so they are written to the device on every regcache_sync() even
when they were never touched.
On a RT712-VA this is not silent: the MIC_ARRAY function does not exist on
that part, so the extra writes are NAKed by the codec and the bus driver
reports
soundwire_intel.link.0: Msg ignored for Slave 6 (for addr: 0x8e00)
for every resume. For the other tables the extra writes are accepted and
only cost bus bandwidth on every runtime resume.
The sorting patches only reorder the existing entries, the text of every
entry is kept verbatim and no default value is changed. Each table was
verified by evaluating the register addresses and replaying lib/bsearch.c
on them.
Entries not reachable by the binary search, per table:
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:40 +0000 (12:02 +0300)]
ASoC: rt1318-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1318_reg_defaults[] is not in address order, so the binary search does
not find 3 of its entries. regcache_reg_needs_sync() then cannot compare
those against their default and reports that a sync is needed, so they
are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:39 +0000 (12:02 +0300)]
ASoC: rt1318: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The 0xdd93 and 0xdd94 entries are listed after 0xddc8 in rt1318_reg[],
which leaves them unreachable for the binary search.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:38 +0000 (12:02 +0300)]
ASoC: rt1316-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1316_reg_defaults[] is not in address order, so the binary search does
not find one of its entries. regcache_reg_needs_sync() then cannot
compare it against its default and reports that a sync is needed, so it
is written to the device on every regcache_sync() even when it was never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:37 +0000 (12:02 +0300)]
ASoC: rt1017-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1017_sdca_reg_defaults[] places the SDCA controls before the lower
vendor registers instead, so the binary search does not find 4 of its
entries. regcache_reg_needs_sync() then cannot compare those against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:36 +0000 (12:02 +0300)]
ASoC: rt721-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt721_sdca_reg_defaults[] is grouped by SDCA function instead, so the
binary search does not find 12 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:35 +0000 (12:02 +0300)]
ASoC: rt715-sdca: sort the register default tables
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Both tables group the entries by SDCA entity instead: in
rt715_reg_defaults_sdca[] the CX_CLK_SEL control is listed before the
ADC8_9, ADC10_11 and ADC7_27 mute controls (7 of 78 entries unreachable),
and in rt715_mbq_reg_defaults_sdca[] the AMIC_GAIN_EN CH_08 entry is listed
before the DMIC_GAIN_EN entries (1 of 32 entries unreachable).
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:34 +0000 (12:02 +0300)]
ASoC: rt715-sdca: drop duplicate reg_default entries
The last two entries of rt715_reg_defaults_sdca[] repeat the ADC7_27 volume
mute controls for CH_01 and CH_02, which are already listed a few lines
above with the same value.
Drop the duplicates. No functional change, regcache_lookup_reg() only ever
finds one of the two copies.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:33 +0000 (12:02 +0300)]
ASoC: rt715: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt715_reg_defaults[] the 0x82xx and 0x83xx entries are
interleaved with the 0x72xx and 0x73xx entries they belong to, and 0x385e
is listed before 0x3859. This leaves 25 of the 323 entries unreachable for
the binary search. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:32 +0000 (12:02 +0300)]
ASoC: rt712-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt712_sdca_reg_defaults[] is grouped by SDCA function instead, so the
binary search does not find 4 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
One of them is the Mic Array Clock Source 0x1C Sample Frequency Index
control, which a part without that function rejects:
soundwire_intel.link.0: Msg ignored for Slave 6, addr: 0x8e00
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:31 +0000 (12:02 +0300)]
ASoC: rt712-sdca-dmic: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt712_sdca_dmic_reg_defaults[] is grouped by SDCA entity instead, so the
binary search does not find 3 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:30 +0000 (12:02 +0300)]
ASoC: rt711-sdca: sort the register default tables
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Both tables group the entries by SDCA entity instead: in
rt711_sdca_reg_defaults[] the CS01 sample frequency index is listed before
the FU05 controls (1 of 54 entries unreachable), and in
rt711_sdca_mbq_defaults[] the MIC_ARRAY FU1E volumes are listed before the
JACK_CODEC FU0F volumes (2 of 25 entries unreachable).
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:29 +0000 (12:02 +0300)]
ASoC: rt711: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt711_reg_defaults[] the 0x83xx entries are interleaved with
the 0x73xx entries they belong to, which leaves 5 of the 269 entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:28 +0000 (12:02 +0300)]
ASoC: rt700: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt700_reg_defaults[] the 0x83xx entries are interleaved with
the 0x73xx entries they belong to, which leaves 6 of the entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:27 +0000 (12:02 +0300)]
ASoC: rt700: drop duplicate reg_default entry
rt700_reg_defaults[] lists register 0x7303 twice with the same value. The
identical rt711 table has the entry only once, so this is a copy-paste
error.
Drop the duplicate. No functional change, regcache_lookup_reg() only ever
finds one of the two entries.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:26 +0000 (12:02 +0300)]
ASoC: rt298: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt298_reg[] instead of being
inserted at their sorted position and the 0x01470100 entry is listed after
0x01470c00, which leaves 7 of the 39 entries unreachable for the binary
search. regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:25 +0000 (12:02 +0300)]
ASoC: rt286: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt286_reg[] instead of being
inserted at their sorted position and the 0x01470100 entry is listed after
0x01470c00, which leaves 7 of the 39 entries unreachable for the binary
search. regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:24 +0000 (12:02 +0300)]
ASoC: rt274: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt274_reg[] instead of being
inserted at their sorted position, which leaves 7 of the 33 entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
ASoC: sophgo: remove unneeded devm_kmemdup() for DAI driver
cv1800b_i2s_dai_template is never modified on a per-instance basis, so
there is no need to duplicate it before registering the component.
Pass the template directly to devm_snd_soc_register_component(), remove
the now-unused local dai pointer, and drop the template's const qualifier
to match the current ASoC API.
Randy Dunlap [Wed, 15 Jul 2026 00:05:25 +0000 (17:05 -0700)]
ASoC: wm8904: don't use "/**" for non-kernel-doc comments
Modify these errant comments to use "/*" since they are not kernel-doc
comments.
Warning: include/sound/wm8904.h:119 This comment starts with '/**', but isn't a kernel-doc comment.
* DRC configurations are specified with a label and a set of register
Warning: ../include/sound/wm8904.h:134 This comment starts with '/**', but isn't a kernel-doc comment.
* ReTune Mobile configurations are specified with a label, sample
Randy Dunlap [Wed, 15 Jul 2026 00:05:24 +0000 (17:05 -0700)]
ASoC: qcom: audioreach: use C-style "/*" comment
Modify the "/**" to use "/*" instead since this is not a kernel-doc
comment. This avoids all kernel-doc warnings in this header file:
Warning: include/uapi/sound/snd_ar_tokens.h:61 Cannot find identifier on line:
* %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
Warning: ../include/uapi/sound/snd_ar_tokens.h:62 Cannot find identifier on line: *
Warning: ../include/uapi/sound/snd_ar_tokens.h:63 Cannot find identifier on line:
* %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
Warning: include/uapi/sound/snd_ar_tokens.h:64 This comment starts with '/**', but isn't a kernel-doc comment.
Randy Dunlap [Wed, 15 Jul 2026 00:05:22 +0000 (17:05 -0700)]
ASoC: soc-acpi: fix all kernel-doc warnings
Add missing "struct" keyword to kernel-doc for structs.
Describe @mach_params in struct snd_soc_acpi_mach.
Don't document callback parameters with '@' as though they are kernel-doc.
These changes avoid all kernel-doc warnings in this header file.
Examples:
Warning: ../include/sound/soc-acpi.h:77 cannot understand function prototype: 'struct snd_soc_acpi_mach_params'
Warning: ../include/sound/soc-acpi.h:101 cannot understand function prototype: 'struct snd_soc_acpi_endpoint'
Warning: ../include/sound/soc-acpi.h:115 cannot understand function prototype: 'struct snd_soc_acpi_adr_device'
Warning: ../include/sound/soc-acpi.h:132 cannot understand function prototype: 'struct snd_soc_acpi_link_adr'
Warning: ../include/sound/soc-acpi.h:209 cannot understand function prototype: 'struct snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 struct member 'mach_params' not described in 'snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 Excess struct member 'card' description in 'snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 Excess struct member 'mach' description in 'snd_soc_acpi_mach'
Randy Dunlap [Wed, 15 Jul 2026 00:05:21 +0000 (17:05 -0700)]
ASoC: SDCA: correct enum names and add a missing struct field
Add a kernel-doc comment for @is_volatile in struct sdca_control.
Correct 2 malformed enum names to match the enums.
Fixes 3 warnings:
Warning: include/sound/sdca_function.h:306 expecting prototype for enum sdca_set_index_range. Prototype was for enum sdca_fdl_set_index_range instead
Warning: include/sound/sdca_function.h:829 struct member 'is_volatile' not described in 'sdca_control'
Warning: include/sound/sdca_function.h:1152 expecting prototype for enum sdca_xu_reset_machanism. Prototype was for enum sdca_xu_reset_mechanism instead
Randy Dunlap [Wed, 15 Jul 2026 00:05:20 +0000 (17:05 -0700)]
ASoC: uniphier: don't use "/**" for non-kernel-doc comment
Use a C-style "/*" comment to avoid multiple kernel-doc warnings:
Warning: ../sound/soc/uniphier/aio.h:159 Cannot find identifier on line:
* 'SoftWare MAPping' setting of UniPhier AIO registers.
Warning: ../sound/soc/uniphier/aio.h:160 Cannot find identifier on line: *
Warning: ../sound/soc/uniphier/aio.h:161 This comment starts with '/**', but isn't a kernel-doc comment.
* We have to setup 'virtual' register maps to access 'real' registers of AIO.
Add missing kernel-doc for function parameters.
Use kernel-doc format for function return value descriptions.
Use the "var" keyword to describe a data definition.
These changes avoid all kernel-doc warnings in this file:
Warning: ../sound/soc/fsl/mpc5200_psc_i2s.c:123 cannot understand function prototype: 'const struct snd_soc_dai_ops psc_i2s_dai_ops ='
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:87 function parameter 'cpu_dai' not described in 'psc_i2s_set_sysclk'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:87 No description found for return value of 'psc_i2s_set_sysclk'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:106 function parameter 'cpu_dai' not described in 'psc_i2s_set_fmt'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:106 No description found for return value of 'psc_i2s_set_fmt'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:123 cannot understand function prototype: 'const struct snd_soc_dai_ops psc_i2s_dai_ops ='
Randy Dunlap [Wed, 15 Jul 2026 00:05:15 +0000 (17:05 -0700)]
ASoC: fsl-dma: fix all kernel-doc warnings
Don't use "/**" for non-kernel-doc comments to avoid kernel-doc warnings:
Warning: ../sound/soc/fsl/fsl_dma.h:95 This comment starts with '/**', but isn't a kernel-doc comment.
* List Descriptor for extended chaining mode DMA operations.
Warning: ../sound/soc/fsl/fsl_dma.h:110 This comment starts with '/**', but isn't a kernel-doc comment.
* Link Descriptor for basic and extended chaining mode DMA operations.
Randy Dunlap [Wed, 15 Jul 2026 00:05:12 +0000 (17:05 -0700)]
ASoC: codecs: NeoFidelity: repair the kernel-doc format
Don't use "/**" for a non-kernel-doc comment.
Use kernel-doc notation to document the parameters and return value of
ntpfw_load().
Fixes these warnings:
Warning: ../sound/soc/codecs/ntpfw.h:2 This comment starts with '/**', but isn't a kernel-doc comment.
* ntpfw.h - Firmware helper functions for Neofidelity codecs
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'i2c' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'name' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'magic' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 No description found for return value of 'ntpfw_load'
Firmware support should be available for all the
devices in the family so that basic pre-processing
blocks can be tuned with the firmware if it is
available.
Niranjan H Y [Thu, 6 Aug 2026 05:34:59 +0000 (11:04 +0530)]
ASoC: tac5xx2-sdw: add rev_id 0x30 support
* HID interrupts: SDCA_12/SDCA_17 instead of was SDCA_11/SDCA_16 in
in older revision.
* UAJ port prepare: write 0xff (jack connected) or 0xdf (disconnected)
This is required to solve the channel prepare timeout error during
boot time with the 0x30 silicon.
Mark Brown [Thu, 6 Aug 2026 12:41:41 +0000 (13:41 +0100)]
ASoC: Rework the SDCA HID code
Charles Keepax <ckeepax@opensource.cirrus.com> says:
This series reworks the SDCA HID code, the primary goals being to no
longer store runtime HID data in the DisCo data structures and remove
the need to pass the soundwire device into the ACPI parsing code.
To achieve this the HID device registration is moved to the IRQ work
flow rather than the ACPI work flow.
Also a few small issues are fixed up along the way, some formatting,
some missing cleanup/docs.
Charles Keepax [Wed, 5 Aug 2026 12:42:05 +0000 (13:42 +0100)]
ASoC: SDCA: Pass swft table through sdca_dev_register()
Rather than passing the SoundWire slave into find_sdca_filesets(),
stash the swift table whilst processing sdca_dev_register(). This
allows us to completely remove the passing of the sdw_slave into
the ACPI parsing code.
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