soundwire: bus_type: Create IRQ mapping before calling driver probe()
Call sdw_irq_create_mapping() before calling the peripheral driver
probe() so that it is possible to request the IRQ during probe().
Previously creation of the mapping was conditional on the use_domain_irq
flag in the driver properties. But these are filled in after probe(),
which meant it wasn't possible to request the IRQ during probe(). This
was ok for MFD drivers where only children requested the IRQ. But for
normal drivers it led to the non-standard behavior of having to defer
requesting the IRQ until after probe().
ASoC: cs35l56: Move cs35l56_irq_request() after cs35l56_irq()
cs35l56_irq_request() references cs35l56_irq() but was above it in the
source (although they are in the other order in the header file). Switch
to convertional C ordering.
This is preparation for a future patch that will stop exporting
cs35l56_irq() and make it static.
ASoC: cs35l56: Request IRQ in cs35l56_common_probe()
Call cs35l56_irq_request() in cs35l56_common_probe() instead of calling
it afterwards in the probe() for each bus type.
Calling cs35l56_irq_request() in each bus probe() is a legacy of dealing
with the oddities of the SoundWire framework. It's no longer serving any
useful purpose to do it outside of the main cs35l56_common_probe().
Shengjiu Wang [Fri, 7 Aug 2026 07:22:02 +0000 (15:22 +0800)]
ASoC: fsl_easrc: fix missing return on success in runtime_resume
Commit 48d84310be60 ("ASoC: fsl_easrc: Use guard() for spin locks")
refactored fsl_easrc_runtime_resume() but accidentally dropped the
early return on the success path. The original code had a skip_load
label followed by "return 0"; that label was removed during cleanup
but the corresponding success return was lost too.
As a result, every successful resume falls through into the
disable_mem_clk error path and calls clk_disable_unprepare() on a
clock that is still in use, leading to an unbalanced clock disable.
Restore the missing "return 0" before the disable_mem_clk error label.
Mark Brown [Fri, 7 Aug 2026 14:57:50 +0000 (15:57 +0100)]
ASoC: codec drivers: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
Affected tables:
ml26124_reg 1 of 79 entries unreachable
cx2072x_reg_defaults 75 of 132 entries unreachable
max9860_reg_defaults 1 of 14 entries unreachable
stih407_sas_reg_defaults 1 of 2 entries unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:11 +0000 (15:28 +0300)]
ASoC: sti-sas: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
STIH407_AUDIO_DAC_CTRL (0xa8) is listed before
STIH407_AUDIO_GLUE_CTRL (0xa4), which makes the latter unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:10 +0000 (15:28 +0300)]
ASoC: max9860: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
MAX9860_PWRMAN (0x10) is listed as the first entry, before
MAX9860_INTEN (0x02), which makes MAX9860_INTEN unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:09 +0000 (15:28 +0300)]
ASoC: cx2072x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The table is grouped by function rather than by address: for every node
the amplifier gain registers (0x41c0, 0x45c0, ...) are listed before the
power state and stream format registers of the same node (0x4014,
0x4414, ...). This leaves 75 of the 132 entries unreachable.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:28:08 +0000 (15:28 +0300)]
ASoC: ml26124: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The Mic Select Control register (0xe8) is listed in the analog path
control group, between 0x5a and 0x60, which makes it unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Move the entry to the end of the table, where it belongs by address.
Mark Brown [Fri, 7 Aug 2026 14:56:06 +0000 (15:56 +0100)]
ASoC: tegra: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
The series is based on broonie/for-linus (05eebef3c7b2).
Affected tables:
tegra210_i2s_reg_defaults 2 of 8 entries unreachable
tegra264_i2s_reg_defaults 4 of 9 entries unreachable
tegra210_mixer_reg_defaults 1 entry unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:48 +0000 (15:27 +0300)]
ASoC: tegra210_mixer: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA210_MIXER_ENABLE (0x400) is the last entry of the table, after
TEGRA210_MIXER_PEAKM_RAM_CTRL (0x434), which makes it unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:47 +0000 (15:27 +0300)]
ASoC: tegra210_i2s: sort the Tegra264 register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA264_I2S_ENABLE (0x100), TEGRA264_I2S_RX_FIFO_WR_ACCESS_MODE (0x30)
and TEGRA264_I2S_TX_FIFO_RD_ACCESS_MODE (0xb0) are listed at the end of
the table, after TEGRA264_I2S_TIMING (0x130), which leaves 4 of the 9
entries unreachable. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:46 +0000 (15:27 +0300)]
ASoC: tegra210_i2s: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TEGRA210_I2S_ENABLE (0x80) is listed after TEGRA210_I2S_CG (0x88) and
TEGRA210_I2S_TIMING (0xa4), so both it and TEGRA210_I2S_TIMING are
unreachable. regcache_reg_needs_sync() then cannot compare them against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Mark Brown [Fri, 7 Aug 2026 14:53:42 +0000 (15:53 +0100)]
ASoC: NXP/Freescale: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address, since
regcache_lookup_reg() locates entries in it with bsearch(). When a table is
not sorted, bsearch() cannot find the entries which follow a descending step,
so regcache_reg_needs_sync() falls back to reporting that a sync is needed for
them. Those registers are then written to the device on every regcache_sync()
even when they were never touched.
See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays")
for the same problem in a different context.
The series is based on broonie/for-linus (05eebef3c7b2).
Affected tables:
sgtl5000_reg_defaults 1 of 35 entries unreachable
fsl_easrc_reg_defaults 3 of 120 entries unreachable
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:28 +0000 (15:27 +0300)]
ASoC: fsl_easrc: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The four REG_EASRC_RRL() entries are listed as a block before the four
REG_EASRC_RRH() ones, but the two registers of a context alternate in
the address map (RRL(n) at 0x110 + 8 * n, RRH(n) at 0x114 + 8 * n).
This leaves REG_EASRC_RRL(1), REG_EASRC_RRL(2) and REG_EASRC_RRL(3)
unreachable. regcache_reg_needs_sync() then cannot compare them against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:27 +0000 (15:27 +0300)]
ASoC: sgtl5000: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
SGTL5000_CHIP_SHORT_CTRL (0x003c) is listed before
SGTL5000_CHIP_ANA_TEST2 (0x003a), which makes the former unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Mark Brown [Fri, 7 Aug 2026 14:51:43 +0000 (15:51 +0100)]
ASoC: TI codecs: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
The reg_defaults array of a regmap_config must be sorted by ascending
register address: regcache_lookup_reg() finds entries in it with
bsearch(), and regcache_init() only kmemdup_array()s the array, it never
sorts it. See commit fd80df352ba1 ("regcache: Add support for sorting
defaults arrays").
When the array is not sorted, bsearch() descends into the wrong half and
a number of entries can never be found. regcache_reg_needs_sync() then
cannot compare the cached value against the default and always reports
that a sync is needed, so those registers are written to the device on
every regcache_sync() even if they were never touched.
I found this while chasing a SoundWire NAK on an unimplemented register
and audited the reg_defaults tables in sound/ by replaying lib/bsearch.c
over each of them. These are the affected TI/Burr-Brown codecs:
The patches only reorder the existing entries. The text of every entry
is kept verbatim, no default value is changed, and each resulting table
was verified to be fully reachable.
tas2783-sdw was fixed separately, it had already been posted.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:49 +0000 (13:41 +0300)]
ASoC: tas675x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS675X_AC_LDG_CTRL_REG (0xb5), TAS675X_TWEETER_DETECT_CTRL_REG (0xb6),
TAS675X_TWEETER_DETECT_THRESH_REG (0xb7) and TAS675X_AC_LDG_FREQ_CTRL_REG
(0xb8) are listed before the 0x7c - 0xa0 block, which leaves 14 of the
69 entries unreachable. regcache_reg_needs_sync() then cannot compare
them against their default and reports that a sync is needed, so they
are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:48 +0000 (13:41 +0300)]
ASoC: tas2780: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2780_DVC (0x1a) is listed before TAS2780_CHNL_0 (0x03), which makes
it unreachable. regcache_reg_needs_sync() then cannot compare it
against its default and reports that a sync is needed, so it is written
to the device on every regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:47 +0000 (13:41 +0300)]
ASoC: tas2764: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2764_DVC (0x1a) is listed before TAS2764_CHNL_0 (0x03), which makes
it unreachable. regcache_reg_needs_sync() then cannot compare it
against its default and reports that a sync is needed, so it is written
to the device on every regcache_sync() even when it was never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:46 +0000 (13:41 +0300)]
ASoC: tas2552: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
TAS2552_OUTPUT_DATA (0x07), TAS2552_PDM_CFG (0x11), TAS2552_PGA_GAIN
(0x12) and TAS2552_BOOST_APT_CTRL (0x14) are listed before
TAS2552_RESERVED_0D (0x0d), TAS2552_LIMIT_RATE_HYS (0x0e) and
TAS2552_CFG_2 (0x02), which leaves 7 of the 21 entries unreachable.
regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 10:41:45 +0000 (13:41 +0300)]
ASoC: pcm512x: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
PCM512x_AUTO_MUTE (page 0, register 59) is listed before
PCM512x_ERROR_DETECT (page 0, register 37) and PCM512x_VCOM_CTRL_2
(page 1, register 9) is listed before the page 0 clocking block, so the
bsearch() descends into the wrong half of the table. 24 of the 45
entries are unreachable, among them every PLL coefficient and clock
divider default. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:13:27 +0000 (12:13 +0300)]
ASoC: tas2783-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
tas2783_reg_default[] is grouped by SDCA entity name instead, so the
binary search does not find 120 of its 196 entries.
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 11:39:11 +0000 (14:39 +0300)]
ASoC: pm4125-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
PM4125_SWR_HPHPA_HD2 (0x3090) is listed before
PM4125_ANA_HPHPA_SPARE_CTL (0x308e), which makes the latter unreachable.
regcache_reg_needs_sync() then cannot compare it against its default and
reports that a sync is needed, so it is written to the device on every
regcache_sync() even when it was never touched.
Mark Brown [Fri, 7 Aug 2026 14:45:39 +0000 (15:45 +0100)]
ASoC: Realtek codecs: sort the reg_defaults tables
Peter Ujfalusi <peter.ujfalusi@linux.intel.com> says:
reg_defaults must be sorted by ascending register address as
regcache_lookup_reg() locates the entries in it with bsearch(), see commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
These tables have entries which are out of order, so the binary search does
not find part of them. For those registers regcache_reg_needs_sync()
cannot compare the cached value against the default and reports that a sync
is needed, so they are written to the device on every regcache_sync() even
when they were never touched.
On a RT712-VA this is not silent: the MIC_ARRAY function does not exist on
that part, so the extra writes are NAKed by the codec and the bus driver
reports
soundwire_intel.link.0: Msg ignored for Slave 6 (for addr: 0x8e00)
for every resume. For the other tables the extra writes are accepted and
only cost bus bandwidth on every runtime resume.
The sorting patches only reorder the existing entries, the text of every
entry is kept verbatim and no default value is changed. Each table was
verified by evaluating the register addresses and replaying lib/bsearch.c
on them.
Entries not reachable by the binary search, per table:
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:40 +0000 (12:02 +0300)]
ASoC: rt1318-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1318_reg_defaults[] is not in address order, so the binary search does
not find 3 of its entries. regcache_reg_needs_sync() then cannot compare
those against their default and reports that a sync is needed, so they
are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:39 +0000 (12:02 +0300)]
ASoC: rt1318: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The 0xdd93 and 0xdd94 entries are listed after 0xddc8 in rt1318_reg[],
which leaves them unreachable for the binary search.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:38 +0000 (12:02 +0300)]
ASoC: rt1316-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1316_reg_defaults[] is not in address order, so the binary search does
not find one of its entries. regcache_reg_needs_sync() then cannot
compare it against its default and reports that a sync is needed, so it
is written to the device on every regcache_sync() even when it was never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:37 +0000 (12:02 +0300)]
ASoC: rt1017-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt1017_sdca_reg_defaults[] places the SDCA controls before the lower
vendor registers instead, so the binary search does not find 4 of its
entries. regcache_reg_needs_sync() then cannot compare those against
their default and reports that a sync is needed, so they are written to
the device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:36 +0000 (12:02 +0300)]
ASoC: rt721-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt721_sdca_reg_defaults[] is grouped by SDCA function instead, so the
binary search does not find 12 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:35 +0000 (12:02 +0300)]
ASoC: rt715-sdca: sort the register default tables
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Both tables group the entries by SDCA entity instead: in
rt715_reg_defaults_sdca[] the CX_CLK_SEL control is listed before the
ADC8_9, ADC10_11 and ADC7_27 mute controls (7 of 78 entries unreachable),
and in rt715_mbq_reg_defaults_sdca[] the AMIC_GAIN_EN CH_08 entry is listed
before the DMIC_GAIN_EN entries (1 of 32 entries unreachable).
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:34 +0000 (12:02 +0300)]
ASoC: rt715-sdca: drop duplicate reg_default entries
The last two entries of rt715_reg_defaults_sdca[] repeat the ADC7_27 volume
mute controls for CH_01 and CH_02, which are already listed a few lines
above with the same value.
Drop the duplicates. No functional change, regcache_lookup_reg() only ever
finds one of the two copies.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:33 +0000 (12:02 +0300)]
ASoC: rt715: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt715_reg_defaults[] the 0x82xx and 0x83xx entries are
interleaved with the 0x72xx and 0x73xx entries they belong to, and 0x385e
is listed before 0x3859. This leaves 25 of the 323 entries unreachable for
the binary search. regcache_reg_needs_sync() then cannot compare them
against their default and reports that a sync is needed, so they are
written to the device on every regcache_sync() even when they were never
touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:32 +0000 (12:02 +0300)]
ASoC: rt712-sdca-sdw: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt712_sdca_reg_defaults[] is grouped by SDCA function instead, so the
binary search does not find 4 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
One of them is the Mic Array Clock Source 0x1C Sample Frequency Index
control, which a part without that function rejects:
soundwire_intel.link.0: Msg ignored for Slave 6, addr: 0x8e00
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:31 +0000 (12:02 +0300)]
ASoC: rt712-sdca-dmic: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
rt712_sdca_dmic_reg_defaults[] is grouped by SDCA entity instead, so the
binary search does not find 3 of its entries. regcache_reg_needs_sync()
then cannot compare those against their default and reports that a sync
is needed, so they are written to the device on every regcache_sync()
even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:30 +0000 (12:02 +0300)]
ASoC: rt711-sdca: sort the register default tables
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Both tables group the entries by SDCA entity instead: in
rt711_sdca_reg_defaults[] the CS01 sample frequency index is listed before
the FU05 controls (1 of 54 entries unreachable), and in
rt711_sdca_mbq_defaults[] the MIC_ARRAY FU1E volumes are listed before the
JACK_CODEC FU0F volumes (2 of 25 entries unreachable).
regcache_reg_needs_sync() then cannot compare those against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:29 +0000 (12:02 +0300)]
ASoC: rt711: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt711_reg_defaults[] the 0x83xx entries are interleaved with
the 0x73xx entries they belong to, which leaves 5 of the 269 entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:28 +0000 (12:02 +0300)]
ASoC: rt700: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
At the end of rt700_reg_defaults[] the 0x83xx entries are interleaved with
the 0x73xx entries they belong to, which leaves 6 of the entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:27 +0000 (12:02 +0300)]
ASoC: rt700: drop duplicate reg_default entry
rt700_reg_defaults[] lists register 0x7303 twice with the same value. The
identical rt711 table has the entry only once, so this is a copy-paste
error.
Drop the duplicate. No functional change, regcache_lookup_reg() only ever
finds one of the two entries.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:26 +0000 (12:02 +0300)]
ASoC: rt298: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt298_reg[] instead of being
inserted at their sorted position and the 0x01470100 entry is listed after
0x01470c00, which leaves 7 of the 39 entries unreachable for the binary
search. regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:25 +0000 (12:02 +0300)]
ASoC: rt286: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt286_reg[] instead of being
inserted at their sorted position and the 0x01470100 entry is listed after
0x01470c00, which leaves 7 of the 39 entries unreachable for the binary
search. regcache_reg_needs_sync() then cannot compare them against their
default and reports that a sync is needed, so they are written to the
device on every regcache_sync() even when they were never touched.
Peter Ujfalusi [Wed, 5 Aug 2026 09:02:24 +0000 (12:02 +0300)]
ASoC: rt274: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
Four entries were appended to the end of rt274_reg[] instead of being
inserted at their sorted position, which leaves 7 of the 33 entries
unreachable for the binary search. regcache_reg_needs_sync() then cannot
compare them against their default and reports that a sync is needed, so
they are written to the device on every regcache_sync() even when they were
never touched.
ASoC: sophgo: remove unneeded devm_kmemdup() for DAI driver
cv1800b_i2s_dai_template is never modified on a per-instance basis, so
there is no need to duplicate it before registering the component.
Pass the template directly to devm_snd_soc_register_component(), remove
the now-unused local dai pointer, and drop the template's const qualifier
to match the current ASoC API.
Randy Dunlap [Wed, 15 Jul 2026 00:05:25 +0000 (17:05 -0700)]
ASoC: wm8904: don't use "/**" for non-kernel-doc comments
Modify these errant comments to use "/*" since they are not kernel-doc
comments.
Warning: include/sound/wm8904.h:119 This comment starts with '/**', but isn't a kernel-doc comment.
* DRC configurations are specified with a label and a set of register
Warning: ../include/sound/wm8904.h:134 This comment starts with '/**', but isn't a kernel-doc comment.
* ReTune Mobile configurations are specified with a label, sample
Randy Dunlap [Wed, 15 Jul 2026 00:05:24 +0000 (17:05 -0700)]
ASoC: qcom: audioreach: use C-style "/*" comment
Modify the "/**" to use "/*" instead since this is not a kernel-doc
comment. This avoids all kernel-doc warnings in this header file:
Warning: include/uapi/sound/snd_ar_tokens.h:61 Cannot find identifier on line:
* %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id
Warning: ../include/uapi/sound/snd_ar_tokens.h:62 Cannot find identifier on line: *
Warning: ../include/uapi/sound/snd_ar_tokens.h:63 Cannot find identifier on line:
* %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph
Warning: include/uapi/sound/snd_ar_tokens.h:64 This comment starts with '/**', but isn't a kernel-doc comment.
Randy Dunlap [Wed, 15 Jul 2026 00:05:22 +0000 (17:05 -0700)]
ASoC: soc-acpi: fix all kernel-doc warnings
Add missing "struct" keyword to kernel-doc for structs.
Describe @mach_params in struct snd_soc_acpi_mach.
Don't document callback parameters with '@' as though they are kernel-doc.
These changes avoid all kernel-doc warnings in this header file.
Examples:
Warning: ../include/sound/soc-acpi.h:77 cannot understand function prototype: 'struct snd_soc_acpi_mach_params'
Warning: ../include/sound/soc-acpi.h:101 cannot understand function prototype: 'struct snd_soc_acpi_endpoint'
Warning: ../include/sound/soc-acpi.h:115 cannot understand function prototype: 'struct snd_soc_acpi_adr_device'
Warning: ../include/sound/soc-acpi.h:132 cannot understand function prototype: 'struct snd_soc_acpi_link_adr'
Warning: ../include/sound/soc-acpi.h:209 cannot understand function prototype: 'struct snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 struct member 'mach_params' not described in 'snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 Excess struct member 'card' description in 'snd_soc_acpi_mach'
Warning: include/sound/soc-acpi.h:230 Excess struct member 'mach' description in 'snd_soc_acpi_mach'
Randy Dunlap [Wed, 15 Jul 2026 00:05:21 +0000 (17:05 -0700)]
ASoC: SDCA: correct enum names and add a missing struct field
Add a kernel-doc comment for @is_volatile in struct sdca_control.
Correct 2 malformed enum names to match the enums.
Fixes 3 warnings:
Warning: include/sound/sdca_function.h:306 expecting prototype for enum sdca_set_index_range. Prototype was for enum sdca_fdl_set_index_range instead
Warning: include/sound/sdca_function.h:829 struct member 'is_volatile' not described in 'sdca_control'
Warning: include/sound/sdca_function.h:1152 expecting prototype for enum sdca_xu_reset_machanism. Prototype was for enum sdca_xu_reset_mechanism instead
Randy Dunlap [Wed, 15 Jul 2026 00:05:20 +0000 (17:05 -0700)]
ASoC: uniphier: don't use "/**" for non-kernel-doc comment
Use a C-style "/*" comment to avoid multiple kernel-doc warnings:
Warning: ../sound/soc/uniphier/aio.h:159 Cannot find identifier on line:
* 'SoftWare MAPping' setting of UniPhier AIO registers.
Warning: ../sound/soc/uniphier/aio.h:160 Cannot find identifier on line: *
Warning: ../sound/soc/uniphier/aio.h:161 This comment starts with '/**', but isn't a kernel-doc comment.
* We have to setup 'virtual' register maps to access 'real' registers of AIO.
Add missing kernel-doc for function parameters.
Use kernel-doc format for function return value descriptions.
Use the "var" keyword to describe a data definition.
These changes avoid all kernel-doc warnings in this file:
Warning: ../sound/soc/fsl/mpc5200_psc_i2s.c:123 cannot understand function prototype: 'const struct snd_soc_dai_ops psc_i2s_dai_ops ='
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:87 function parameter 'cpu_dai' not described in 'psc_i2s_set_sysclk'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:87 No description found for return value of 'psc_i2s_set_sysclk'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:106 function parameter 'cpu_dai' not described in 'psc_i2s_set_fmt'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:106 No description found for return value of 'psc_i2s_set_fmt'
Warning: sound/soc/fsl/mpc5200_psc_i2s.c:123 cannot understand function prototype: 'const struct snd_soc_dai_ops psc_i2s_dai_ops ='
Randy Dunlap [Wed, 15 Jul 2026 00:05:15 +0000 (17:05 -0700)]
ASoC: fsl-dma: fix all kernel-doc warnings
Don't use "/**" for non-kernel-doc comments to avoid kernel-doc warnings:
Warning: ../sound/soc/fsl/fsl_dma.h:95 This comment starts with '/**', but isn't a kernel-doc comment.
* List Descriptor for extended chaining mode DMA operations.
Warning: ../sound/soc/fsl/fsl_dma.h:110 This comment starts with '/**', but isn't a kernel-doc comment.
* Link Descriptor for basic and extended chaining mode DMA operations.
Randy Dunlap [Wed, 15 Jul 2026 00:05:12 +0000 (17:05 -0700)]
ASoC: codecs: NeoFidelity: repair the kernel-doc format
Don't use "/**" for a non-kernel-doc comment.
Use kernel-doc notation to document the parameters and return value of
ntpfw_load().
Fixes these warnings:
Warning: ../sound/soc/codecs/ntpfw.h:2 This comment starts with '/**', but isn't a kernel-doc comment.
* ntpfw.h - Firmware helper functions for Neofidelity codecs
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'i2c' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'name' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 function parameter 'magic' not described in 'ntpfw_load'
Warning: sound/soc/codecs/ntpfw.h:20 No description found for return value of 'ntpfw_load'
Firmware support should be available for all the
devices in the family so that basic pre-processing
blocks can be tuned with the firmware if it is
available.
Niranjan H Y [Thu, 6 Aug 2026 05:34:59 +0000 (11:04 +0530)]
ASoC: tac5xx2-sdw: add rev_id 0x30 support
* HID interrupts: SDCA_12/SDCA_17 instead of was SDCA_11/SDCA_16 in
in older revision.
* UAJ port prepare: write 0xff (jack connected) or 0xdf (disconnected)
This is required to solve the channel prepare timeout error during
boot time with the 0x30 silicon.
Mark Brown [Thu, 6 Aug 2026 12:41:41 +0000 (13:41 +0100)]
ASoC: Rework the SDCA HID code
Charles Keepax <ckeepax@opensource.cirrus.com> says:
This series reworks the SDCA HID code, the primary goals being to no
longer store runtime HID data in the DisCo data structures and remove
the need to pass the soundwire device into the ACPI parsing code.
To achieve this the HID device registration is moved to the IRQ work
flow rather than the ACPI work flow.
Also a few small issues are fixed up along the way, some formatting,
some missing cleanup/docs.
Charles Keepax [Wed, 5 Aug 2026 12:42:05 +0000 (13:42 +0100)]
ASoC: SDCA: Pass swft table through sdca_dev_register()
Rather than passing the SoundWire slave into find_sdca_filesets(),
stash the swift table whilst processing sdca_dev_register(). This
allows us to completely remove the passing of the sdw_slave into
the ACPI parsing code.
Charles Keepax [Wed, 5 Aug 2026 12:42:03 +0000 (13:42 +0100)]
ASoC: SDCA: Add missing destroy for HID device
The SDCA code is currently missing a cleanup for HID devices when the
drivers are unbound. Add the missing HID cleanup as part of the IRQ
cleanup to mirror when the HID device is created.
Charles Keepax [Wed, 5 Aug 2026 12:42:01 +0000 (13:42 +0100)]
ASoC: SDCA: Move HID descriptors to function
The HID descriptors are defined at the function level in DisCo
and as such it makes more sense to parse and store them at
that level in the SDCA code. This shouldn't really make much
practical difference but is conceptually better and avoids
passing the function node down to the entity parsing code.
Charles Keepax [Wed, 5 Aug 2026 12:42:00 +0000 (13:42 +0100)]
ASoC: SDCA: Move HID registration to IRQ time
Currently, the SDCA code registers the HID device whilst parsing
the DisCo information. This necessitates storing the HID device
in the DisCo structs, which are intended to only store the parsed
DisCo. Having the HID device registered so early in the process
also causes some issues with cleaning up.
Update the code to register the HID device as the IRQs are handled,
this alleviates the previous concerns and brings the support inline
with the other SDCA event handling.
As part of this move the naming for the SDCA HID is also updated,
it saves some complexity around the passing of the SoundWire device
to include this in this patch. Update to using the dev_name for
the phys, which is more consistent with other HID users, and use
the actual function name/address for the HID name itself.
This series removes the modem-specific voice call support implementation
from the cpcap codec driver and moves the DAI configuration towards the
standard ASoC DAI link configuration model.
The previous implementation added a cpcap-specific .set_tdm_slot()
callback and relied on a client driver to locate and configure the codec
DAI directly using snd_soc_dai_set_*() APIs. This couples the codec
driver to a particular client implementation and bypasses the normal ASoC
configuration flow.
Instead, the voice DAI configuration can be described by the DAI link and
DT, allowing the ASoC core to apply the required format configuration.
The series:
- removes the old modem-specific voice call support implementation;
- makes the cpcap voice DAI format follow the configuration specified by
DT.
Patch 1 removes the obsolete implementation.
Patch 2 updates cpcap to apply the DAI format from the runtime DAI link.
The reverted implementation was added to support a modem driver that
directly locates and configures the codec DAI using snd_soc_find_dai()
together with snd_soc_dai_set_sysclk(), snd_soc_dai_set_fmt() and
snd_soc_dai_set_tdm_slot().
The DAI configuration should instead be provided by the ASoC DAI link,
allowing the machine driver or DT to describe the interface rather than
having a client driver configure the codec directly.
Peter Ujfalusi [Wed, 5 Aug 2026 12:27:13 +0000 (15:27 +0300)]
ASoC: adau1761: sort the register default table
reg_defaults must be sorted by ascending register address, as
regcache_lookup_reg() locates entries in it with bsearch(). See commit fd80df352ba1 ("regcache: Add support for sorting defaults arrays").
The table lists the ADAU1761 specific registers (0x4008 and up) before
the block shared with the ADAU1381/ADAU1781, which starts at
ADAU17X1_CLOCK_CONTROL (0x4000), so bsearch() descends into the wrong
half and 28 of the 52 entries are unreachable.
regcache_reg_needs_sync() then cannot compare them against their default
and reports that a sync is needed, so they are written to the device on
every regcache_sync() even when they were never touched.
Sort the table by register address.
Fixes: dab464b60b24 ("ASoC: Add ADAU1361/ADAU1761 audio CODEC support") Cc: stable@vger.kernel.org Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20260805122713.11376-1-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
firmware: cs_dsp: Fix mock register default typo in KUnit test
Correct the address of the HALO_SCRATCH4 entry in halo_register_defaults[].
This doesn't affect the validity of the KUnit testing because none of the
tests rely on this value. It's only defaulted because cs_dsp will read it
when the DSP state changes from running to stopped - this would only have
logged a warning about failure to read the register but it doesn't cause
anything to fail.
Cezary Rojewski [Wed, 5 Aug 2026 06:44:35 +0000 (08:44 +0200)]
ASoC: Intel: Remove obsolete UAPI headers
Both target Intel's skylake-driver, previously found in sound/soc/intel
which has been removed few years ago and succeeded by the avs-driver.
snd_sst_tokens.h is succeeded by uapi/sound/intel/avs/tokens.h
skl-tplg-interface.h to the best of my knowledge has no users. Its types
are reflected in sound/soc/intel/avs/messages.h and are not intended for
public use. Closest public equivalent would be the firmware's
processing modules but in such case a user has to compile against
Intel's AudioDSP headers, not Linux ones.
ASoC: soc-topology-test: use snd_soc_register_component()
It is calling snd_soc_component_initialize() / snd_soc_add_component().
We can now use snd_soc_register_component() instead.
It is using container_of() to get kunit_soc_component from component, but
will not be able to use it when capsuling has done.
We can use snd_soc_component_to_priv() instead.
ASoC: soc-generic-dmaengine-pcm: use snd_soc_register_component()
it is calling snd_soc_component_initialize() / snd_soc_add_component().
We can now use snd_soc_register_component() instead.
It is using container_of() to get dmaengine_pcm from component, but
will not be able to use it when capsuling has done.
We can now use snd_soc_component_to_priv() instead.
ASoC: intel: avs: use snd_soc_register_component()
It is calling snd_soc_component_initialize() / snd_soc_add_component().
We can now use snd_soc_register_component() instead.
It is using container_of() to get avs_soc_component from component, but
will not be able to use it when capsuling has done.
We can now use snd_soc_component_to_priv() instead.
We have snd_soc_register_component() (A), but we can't setup component
specific setting, like name, etc from driver, because component
itself is allocated in that function (x).
(A) int snd_soc_register_component(...)
{
...
(x) component = devm_kzalloc(...);
if (!component)
return -ENOMEM;
(B) ret = snd_soc_component_initialize(...);
if (ret < 0)
return ret;
(C) return snd_soc_add_component(...);
}
So each driver needs to use snd_soc_component_{initialize/add}() (= B/C)
instead of using snd_soc_register_component() (A), but it looks
unbalanced with its paired unregiser function.
Let's merge (B) and (C) into new register function, and allows component
as parameter. We can use both
snd_soc_register_component(dev, ...); // already exists
snd_soc_register_component(component, ...); // new function
Julia Lawall [Sat, 1 Aug 2026 19:09:57 +0000 (21:09 +0200)]
ASoC: wm8940: drop unneeded semicolon
When a function-like macro expands to an expression, that expression
doesn't need a semicolon after it. All uses have been verified to
have their own semicolons.
This was found using the following Coccinelle semantic patch:
@r@
identifier i : script:ocaml() { String.lowercase_ascii i = i };
expression e;
@@
Shenghao Ding [Tue, 4 Aug 2026 11:14:33 +0000 (19:14 +0800)]
ASoC: tas2781: add capture_profile_id field and update the tuning_switch function
Currently, the TAS2781 SmartAMP driver uses the same profile ID for both
playback and capture scenarios (e.g., PDM microphone recording or IV data
capture). This makes it impossible to apply different DSP configurations
for capture and playback, which is required in real-world tuning and
production use cases. With these changes, capture and playback paths now
use their own DSP profiles, improving tuning flexibility and avoiding
unintended profile conflicts between SmartAMP capture and playback
scenarios.
Add AudioReach support for LPASS Audio IF based TDM backends and wire it
up for the sc8280xp machine driver.
The series first adds topology-driven Audio IF source/sink handling so
the DSP interface parameters can be described by topology while runtime
media format and slot configuration still come from the machine driver.
It then adds TDM DAI operations for q6apm-lpass-dais, exposes the Audio
IF clock IDs through the q6dsp-lpass-ports binding and q6prm clock
tables, and introduces common QCOM helpers for parsing standard
dai-tdm-slot-* properties from backend CPU and codec endpoints.
Finally, sc8280xp uses the common helpers during hw_params to program
CPU and codec TDM slots, derive the backend bit clock from the active
PCM parameters, and request the CPU and codec clocks before the stream is
started.
Prasad Kumpatla [Tue, 4 Aug 2026 07:03:07 +0000 (12:33 +0530)]
ASoC: qcom: sc8280xp: add TDM hw_params support
Add TDM backend handling to the sc8280xp machine driver.
Use the common QCOM DAI-node TDM helper to parse the standard
DAI TDM slot properties from backend CPU and codec endpoints. Reuse the
parsed configuration when programming DAIs so hw_params does not need a
second DT traversal.
Derive the LPASS backend bit clock from the runtime TDM parameters and
request it through the backend child-clock path using LPAIF_MI2S_BCLK.
Program codec sysclk in hw_params so codec PLL setup happens before the
stream is triggered.
Prasad Kumpatla [Tue, 4 Aug 2026 07:03:06 +0000 (12:33 +0530)]
ASoC: qcom: common: add DAI-node TDM slot helpers
Add common helpers to parse standard dai-tdm-slot-* properties from the
CPU and codec child nodes of a backend DAI link and apply the result to
the active DAIs.
QCOM machine drivers already use qcom_snd_parse_of() to build links from
DT, but they lacked a shared helper to translate endpoint TDM properties
into snd_soc_dai_set_tdm_slot() calls. Boards therefore had to carry ad
hoc parsing or rely on non-standard DT properties.
The helpers parse endpoint masks, validate the shared slot count and
slot width, and program CPU and codec DAIs with the resulting slot
configuration. A cfg-based apply helper is provided for callers that
already parsed the DT data and want to avoid a second DT traversal.
Allow standard dai-tdm-slot-* properties in the CPU and codec child
nodes of a DAI link.
The QCOM machine driver parses these child nodes to configure TDM slots
on the active CPU and codec DAIs. The properties are already defined by
the common tdm-slot binding, but qcom,sm8250.yaml currently rejects them
because the CPU and codec child nodes set additionalProperties: false.
Permit dai-tdm-slot-num, dai-tdm-slot-width and dai-tdm-slot-[rt]x-mask
there so boards using TDM backends can describe the slot layout without
schema warnings.
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