From 0bfcccd100f56721a08d065f57764bc09b54429e Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 25 Aug 2004 18:25:47 -0700 Subject: [PATCH] [PATCH] ppc32: Improve workaround for 74xx CPUs with broken BTIC The previous workaround didn't enable the BTIC bit on CPUs where it is broken. However, it seems some firmwares will unconditionally set it, so this new patch will actually _clear_ it on CPUs where it is broken. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Linus Torvalds --- arch/ppc/kernel/cpu_setup_6xx.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S index ee0705c6e3abc..6ba5ef411dd0a 100644 --- a/arch/ppc/kernel/cpu_setup_6xx.S +++ b/arch/ppc/kernel/cpu_setup_6xx.S @@ -218,10 +218,10 @@ setup_745x_specifics: /* All of the bits we have to set..... */ - ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE | HID0_LRSTK + ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE | HID0_LRSTK | HID0_BTIC BEGIN_FTR_SECTION - ori r11,r11,HID0_BTIC -END_FTR_SECTION_IFCLR(CPU_FTR_NO_BTIC) + xori r11,r11,HID0_BTIC +END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC) BEGIN_FTR_SECTION oris r11,r11,HID0_DPM@h /* enable dynamic power mgmt */ END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM) -- 2.53.0