From 16bc4493bbf3be76b08e980b2f2380987c3ac9f4 Mon Sep 17 00:00:00 2001 From: Michal Wajdeczko Date: Mon, 22 Jun 2026 15:23:39 +0200 Subject: [PATCH] drm/xe/mmio: Add check for minimal BAR size We initialized the root tile's xe_mmio structure with a new size of 4MiB without sanity checks to see if mapped GTTMMADR_BAR was actually at least that size. Check BAR size against first 16MiB, which is expected minimum BAR size for the one-tile platforms. Signed-off-by: Michal Wajdeczko Reviewed-by: Matthew Auld Link: https://patch.msgid.link/20260622132342.19600-4-michal.wajdeczko@intel.com --- drivers/gpu/drm/xe/xe_mmio.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index fce890b6410c7..8dd818e1184c8 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -101,13 +101,18 @@ int xe_mmio_probe_early(struct xe_device *xe) struct xe_tile *root_tile = xe_device_get_root_tile(xe); struct pci_dev *pdev = to_pci_dev(xe->drm.dev); - xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR); xe->mmio.regs = pcim_iomap(pdev, GTTMMADR_BAR, 0); if (!xe->mmio.regs) { xe_err(xe, "Failed to map GTTMMADR_BAR\n"); return -EIO; } + xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR); + if (xe->mmio.size < SZ_16M) { + xe_err(xe, "GTTMMADR_BAR is too small: %zu\n", xe->mmio.size); + return -EIO; + } + /* Setup first tile; other tiles (if present) will be setup later. */ xe_mmio_init(&root_tile->mmio, root_tile, xe->mmio.regs, SZ_4M); -- 2.53.0