From 18250f9e97ff1f64b1f7e6f3dc0e9a96d8234985 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 19 Oct 2004 00:56:50 +0100 Subject: [PATCH] [ARM PATCH] 2144/1: S3C2410 - s3c2440 fixes and clock updates Patch from Ben Dooks Fixes the following problems and ommisions: - added variable for base crystal rate - moved clock variables into clock.c - fixed bug in identifying s3c2440 cpus - added initial support for new uart registration - removed base blocks from include/asm/arch/hardware.h Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/clock.c | 12 +++-- arch/arm/mach-s3c2410/clock.h | 7 +++ arch/arm/mach-s3c2410/cpu.c | 2 +- arch/arm/mach-s3c2410/cpu.h | 1 - arch/arm/mach-s3c2410/mach-h1940.c | 7 +-- arch/arm/mach-s3c2410/s3c2410.c | 60 +++++++++++++++++-------- arch/arm/mach-s3c2410/s3c2410.h | 4 ++ arch/arm/mach-s3c2410/s3c2440.c | 30 ++++++------- arch/arm/mach-s3c2410/time.c | 7 +-- include/asm-arm/arch-s3c2410/hardware.h | 6 +-- 10 files changed, 85 insertions(+), 51 deletions(-) diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index a12ade71b25aa..31b2fa7878d38 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -46,6 +46,12 @@ #include "clock.h" +/* clock information */ + +unsigned long s3c24xx_xtal = 12*1000*1000; /* default 12MHz */ +unsigned long s3c24xx_fclk; +unsigned long s3c24xx_hclk; +unsigned long s3c24xx_pclk; static LIST_HEAD(clocks); static DECLARE_MUTEX(clocks_sem); @@ -277,9 +283,9 @@ static int __init s3c2410_init_clocks(void) /* initialise the main system clocks */ - clk_h.rate = s3c2410_hclk; - clk_p.rate = s3c2410_pclk; - clk_f.rate = s3c2410_fclk; + clk_h.rate = s3c24xx_hclk; + clk_p.rate = s3c24xx_pclk; + clk_f.rate = s3c24xx_fclk; /* set the enabled clocks to a minimal (known) state */ __raw_writel(S3C2410_CLKCON_PWMT | S3C2410_CLKCON_UART0 | S3C2410_CLKCON_UART1 | S3C2410_CLKCON_UART2 | S3C2410_CLKCON_GPIO | S3C2410_CLKCON_RTC, S3C2410_CLKCON); diff --git a/arch/arm/mach-s3c2410/clock.h b/arch/arm/mach-s3c2410/clock.h index 4c7b94e87533a..98ed074f62411 100644 --- a/arch/arm/mach-s3c2410/clock.h +++ b/arch/arm/mach-s3c2410/clock.h @@ -18,3 +18,10 @@ struct clk { unsigned long rate; unsigned long ctrlbit; }; + +/* processor clock settings, in Hz */ + +extern unsigned long s3c24xx_xtal; +extern unsigned long s3c24xx_pclk; +extern unsigned long s3c24xx_hclk; +extern unsigned long s3c24xx_fclk; diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c index 42eec79128587..de9d0ef150ed8 100644 --- a/arch/arm/mach-s3c2410/cpu.c +++ b/arch/arm/mach-s3c2410/cpu.c @@ -104,7 +104,7 @@ s3c_lookup_cpu(unsigned long idcode) int count; tab = cpu_ids; - for (count = 0; count < ARRAY_SIZE(cpu_ids); count++) { + for (count = 0; count < ARRAY_SIZE(cpu_ids); count++, tab++) { if ((idcode & tab->idmask) == tab->idcode) return tab; } diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index b0053d76db7c8..e2cc5d9c856f6 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h @@ -38,4 +38,3 @@ extern void s3c2440_map_io(struct map_desc *mach_desc, int size); #endif extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); - diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 397c546b7c6a1..ebc68525bcdd8 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -41,6 +41,7 @@ #include #include "s3c2410.h" +#include "clock.h" #include "devs.h" #include "cpu.h" @@ -56,7 +57,7 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = { [0] = { .hwport = 0, .flags = 0, - .clock = &s3c2410_pclk, + .clock = &s3c24xx_pclk, .ucon = 0x3c5, .ulcon = 0x03, .ufcon = 0x51, @@ -64,7 +65,7 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = { [1] = { .hwport = 1, .flags = 0, - .clock = &s3c2410_pclk, + .clock = &s3c24xx_pclk, .ucon = 0x245, .ulcon = 0x03, .ufcon = 0x00, @@ -73,7 +74,7 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] = { [2] = { .hwport = 2, .flags = 0, - .clock = &s3c2410_pclk, + .clock = &s3c24xx_pclk, .ucon = 0x3c5, .ulcon = 0x43, .ufcon = 0x51, diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 7709e8dde3dc4..579068974d44f 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -15,6 +15,7 @@ * 05-Sep-2003 BJD Moved to kernel v2.6 * 18-Jan-2004 BJD Added serial port configuration * 21-Aug-2004 BJD Added new struct s3c2410_board handler + * 28-Sep-2004 BJD Updates for new serial port bits */ #include @@ -38,6 +39,7 @@ #include "s3c2410.h" #include "cpu.h" +#include "clock.h" int s3c2410_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */ @@ -45,11 +47,7 @@ int s3c2410_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */ struct s3c2410_uartcfg *s3c2410_uartcfgs; -/* clock info */ - -unsigned long s3c2410_fclk; -unsigned long s3c2410_hclk; -unsigned long s3c2410_pclk; +/* Initial IO mappings */ static struct map_desc s3c2410_iodesc[] __initdata = { IODESC_ENT(USBHOST), @@ -131,6 +129,39 @@ static struct platform_device *uart_devices[] __initdata = { &s3c_uart2 }; +/* store our uart devices for the serial driver console */ +struct platform_device *s3c2410_uart_devices[3]; + +static int s3c2410_uart_count = 0; + +/* uart registration process */ + +void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + struct platform_device *platdev; + int uart; + + s3c2410_uartcfgs = cfg; /* compatibility */ + + for (uart = 0; uart < no; uart++, cfg++) { + platdev = uart_devices[cfg->hwport]; + + s3c2410_uart_devices[uart] = platdev; + platdev->dev.platform_data = cfg; + } + + s3c2410_uart_count = uart; +} + +/* s3c2410_map_io + * + * register the standard cpu IO areas, and any passed in from the + * machine specific initialisation. + * + * this function also sets the initial clock frequencies from the + * settings passed in +*/ + void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size) { unsigned long tmp; @@ -140,26 +171,24 @@ void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size) iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); iotable_init(mach_desc, mach_size); - printk("machine_initted %p,%d\n", mach_desc, mach_size); - /* now we've got our machine bits initialised, work out what * clocks we've got */ - s3c2410_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), 12*MHZ); + s3c24xx_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), + s3c24xx_xtal); tmp = __raw_readl(S3C2410_CLKDIVN); - //printk("tmp=%08x, fclk=%d\n", tmp, s3c2410_fclk); /* work out clock scalings */ - s3c2410_hclk = s3c2410_fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1); - s3c2410_pclk = s3c2410_hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); + s3c24xx_hclk = s3c24xx_fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1); + s3c24xx_pclk = s3c24xx_hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); /* print brieft summary of clocks, etc */ printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", - print_mhz(s3c2410_fclk), print_mhz(s3c2410_hclk), - print_mhz(s3c2410_pclk)); + print_mhz(s3c24xx_fclk), print_mhz(s3c24xx_hclk), + print_mhz(s3c24xx_pclk)); } static struct s3c2410_board *board; @@ -169,11 +198,6 @@ void s3c2410_set_board(struct s3c2410_board *b) board = b; } -void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c2410_uartcfgs = cfg; -} - int __init s3c2410_init(void) { int ret; diff --git a/arch/arm/mach-s3c2410/s3c2410.h b/arch/arm/mach-s3c2410/s3c2410.h index 09742c9bc5b49..acff2c8896e4c 100644 --- a/arch/arm/mach-s3c2410/s3c2410.h +++ b/arch/arm/mach-s3c2410/s3c2410.h @@ -15,8 +15,12 @@ * 04-Sep-2004 BJD Added s3c2410_init_uarts() call */ +struct s3c2410_uartcfg; + extern void s3c2410_map_io(struct map_desc *, int count); +extern void s3c2410_init_uarts(struct s3c2410_uartcfg *, int no); + extern void s3c2410_init_irq(void); extern void s3c2410_init_time(void); diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c index f4bb10c580fd1..5469524b24faa 100644 --- a/arch/arm/mach-s3c2410/s3c2440.c +++ b/arch/arm/mach-s3c2410/s3c2440.c @@ -10,7 +10,8 @@ * published by the Free Software Foundation. * * Modifications: - * 24-Aug-2004 BJD Start of s3c2440 support + * 24-Aug-2004 BJD Start of s3c2440 support + * 12-Oct-2004 BJD Moved clock info out to clock.c */ #include @@ -33,19 +34,14 @@ #include #include "s3c2440.h" +#include "clock.h" #include "cpu.h" int s3c2440_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */ /* clock info */ - -unsigned long s3c2440_baseclk = 12*1000*1000; /* assume base is 12MHz */ unsigned long s3c2440_hdiv; -unsigned long s3c2440_fclk; -unsigned long s3c2440_hclk; -unsigned long s3c2440_pclk; - static struct map_desc s3c2440_iodesc[] __initdata = { IODESC_ENT(USBHOST), IODESC_ENT(CLKPWR), @@ -126,7 +122,7 @@ static struct platform_device *uart_devices[] __initdata = { void __init s3c2440_map_io(struct map_desc *mach_desc, int size) { - unsigned long tmp; + unsigned long clkdiv; unsigned long camdiv; /* register our io-tables */ @@ -137,15 +133,15 @@ void __init s3c2440_map_io(struct map_desc *mach_desc, int size) /* now we've got our machine bits initialised, work out what * clocks we've got */ - s3c2440_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), - s3c2440_baseclk); + s3c24xx_fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), + s3c24xx_xtal) * 2; - tmp = __raw_readl(S3C2410_CLKDIVN); + clkdiv = __raw_readl(S3C2410_CLKDIVN); camdiv = __raw_readl(S3C2440_CAMDIVN); /* work out clock scalings */ - switch (tmp & S3C2440_CLKDIVN_HDIVN_MASK) { + switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { case S3C2440_CLKDIVN_HDIVN_1: s3c2440_hdiv = 1; break; @@ -159,18 +155,18 @@ void __init s3c2440_map_io(struct map_desc *mach_desc, int size) break; case S3C2440_CLKDIVN_HDIVN_3_6: - s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 6 : 3; + s3c2440_hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; break; } - s3c2440_hclk = s3c2440_fclk / s3c2440_hdiv; - s3c2440_pclk = s3c2440_hclk / ((tmp & S3C2440_CLKDIVN_PDIVN) ? 2 : 1); + s3c24xx_hclk = s3c24xx_fclk / s3c2440_hdiv; + s3c24xx_pclk = s3c24xx_hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); /* print brieft summary of clocks, etc */ printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", - print_mhz(s3c2440_fclk), print_mhz(s3c2440_hclk), - print_mhz(s3c2440_pclk)); + print_mhz(s3c24xx_fclk), print_mhz(s3c24xx_hclk), + print_mhz(s3c24xx_pclk)); } diff --git a/arch/arm/mach-s3c2410/time.c b/arch/arm/mach-s3c2410/time.c index 04ba5dfe02d07..f686cc4355d70 100644 --- a/arch/arm/mach-s3c2410/time.c +++ b/arch/arm/mach-s3c2410/time.c @@ -34,10 +34,11 @@ #include #include +#include "clock.h" + static unsigned long timer_startval; static unsigned long timer_ticks_usec; - /* with an 12MHz clock, we get 12 ticks per-usec */ @@ -139,7 +140,7 @@ void __init s3c2410_init_time (void) */ if (machine_is_h1940() || machine_is_smdk2410() ) { - timer_ticks_usec = s3c2410_pclk / (1000*1000); + timer_ticks_usec = s3c24xx_pclk / (1000*1000); timer_ticks_usec /= 6; tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; @@ -148,7 +149,7 @@ void __init s3c2410_init_time (void) tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT; - tcnt = (s3c2410_pclk / 6) / HZ; + tcnt = (s3c24xx_pclk / 6) / HZ; } diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 5b58f2aeab46e..7b489fde8fdf4 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -16,6 +16,7 @@ * 12-Mar-2004 BJD Fixed include protection, fixed type of clock vars * 14-Sep-2004 BJD Added misccr and getpin to gpio * 01-Oct-2004 BJD Added the new gpio functions + * 16-Oct-2004 BJD Removed the clock variables */ #ifndef __ASM_ARCH_HARDWARE_H @@ -23,11 +24,6 @@ #ifndef __ASSEMBLY__ -/* processor clock settings, in Hz */ -extern unsigned long s3c2410_pclk; -extern unsigned long s3c2410_hclk; -extern unsigned long s3c2410_fclk; - /* external functions for GPIO support * * These allow various different clients to access the same GPIO -- 2.53.0