From 600223fe334f62ad2eb37b979ac9ea0e89e99899 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Fri, 17 Oct 2003 09:16:49 +1000 Subject: [PATCH] ppc64: Fix for sym2 problem (first place that checked pci_set_mwi return code) --- include/asm-ppc64/pci.h | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/include/asm-ppc64/pci.h b/include/asm-ppc64/pci.h index 8862dc52c483a..da09c77b8123b 100644 --- a/include/asm-ppc64/pci.h +++ b/include/asm-ppc64/pci.h @@ -34,12 +34,15 @@ struct pci_dev; #define HAVE_ARCH_PCI_MWI 1 static inline int pcibios_prep_mwi(struct pci_dev *dev) { - /* - * pSeries firmware sets cacheline size and hardware treats - * MWI the same as memory write, so we dont change cacheline size - * or the MWI bit. + /* + * We would like to avoid touching the cacheline size or MWI bit + * but we cant do that with the current pcibios_prep_mwi + * interface. pSeries firmware sets the cacheline size (which is not + * the cpu cacheline size in all cases) and hardware treats MWI + * the same as memory write. So we dont touch the cacheline size + * here and allow the generic code to set the MWI bit. */ - return 1; + return 0; } extern unsigned int pcibios_assign_all_busses(void); -- 2.53.0