From 9f643c7479c48b5def4c755e8399a86e2bf300bd Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Sat, 4 Oct 2003 23:46:52 +0100 Subject: [PATCH] [ARM PATCH] 1624/1: BE support for io-readsl-armv4.S, io-reads-armv4.S, io-writesw-armv4.S Patch from Deepak Saxena --- arch/arm/lib/io-readsl-armv4.S | 50 ++++++++++++++++++++++++++++++++- arch/arm/lib/io-readsw-armv4.S | 23 +++++++++------ arch/arm/lib/io-writesw-armv4.S | 43 +++++++++++++--------------- 3 files changed, 83 insertions(+), 33 deletions(-) diff --git a/arch/arm/lib/io-readsl-armv4.S b/arch/arm/lib/io-readsl-armv4.S index 34e413447b544..449b7380f2ef5 100644 --- a/arch/arm/lib/io-readsl-armv4.S +++ b/arch/arm/lib/io-readsl-armv4.S @@ -9,7 +9,6 @@ */ #include #include -#include /* * Note that some reads can be aligned on half-word boundaries. @@ -31,6 +30,10 @@ ENTRY(__raw_readsl) blt 4f bgt 6f +#ifndef __ARMEB__ + + /* little endian code */ + strh ip, [r1], #2 mov ip, ip, lsr #16 3: subs r2, r2, #1 @@ -68,3 +71,48 @@ ENTRY(__raw_readsl) strb ip, [r1] mov pc, lr +#else + + /* big endian code */ + + + mov r3, ip, lsr #16 + strh r3, [r1], #2 +3: mov r3, ip, lsl #16 + subs r2, r2, #1 + ldrne ip, [r0] + orrne r3, r3, ip, lsr #16 + strne r3, [r1], #4 + bne 3b + strh ip, [r1], #2 + mov pc, lr + +4: mov r3, ip, lsr #24 + strb r3, [r1], #1 + mov r3, ip, lsr #8 + strh r3, [r1], #2 +5: mov r3, ip, lsl #24 + subs r2, r2, #1 + ldrne ip, [r0] + orrne r3, r3, ip, lsr #8 + strne r3, [r1], #4 + bne 5b + strb ip, [r1], #1 + mov pc, lr + +6: mov r3, ip, lsr #24 + strb r3, [r1], #1 +7: mov r3, ip, lsl #8 + subs r2, r2, #1 + ldrne ip, [r0] + orrne r3, r3, ip, lsr #24 + strne r3, [r1], #4 + bne 7b + mov r3, ip, lsr #8 + strh r3, [r1], #2 + strb ip, [r1], #1 + mov pc, lr + +#endif + + diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S index 1b10396936267..28c8a351119cd 100644 --- a/arch/arm/lib/io-readsw-armv4.S +++ b/arch/arm/lib/io-readsw-armv4.S @@ -9,7 +9,14 @@ */ #include #include -#include + + .macro pack, rd, hw1, hw2 +#ifndef __ARMEB__ + orr \rd, \hw1, \hw2, lsl #16 +#else + orr \rd, \hw2, \hw1, lsl #16 +#endif + .endm .insw_bad_alignment: adr r0, .insw_bad_align_msg @@ -41,19 +48,19 @@ ENTRY(__raw_readsw) .insw_8_lp: ldrh r3, [r0] ldrh r4, [r0] - orr r3, r3, r4, lsl #16 + pack r3, r3, r4 ldrh r4, [r0] ldrh r5, [r0] - orr r4, r4, r5, lsl #16 + pack r4, r4, r5 ldrh r5, [r0] ldrh ip, [r0] - orr r5, r5, ip, lsl #16 + pack r5, r5, ip ldrh ip, [r0] ldrh lr, [r0] - orr ip, ip, lr, lsl #16 + pack ip, ip, lr stmia r1!, {r3 - r5, ip} @@ -68,11 +75,11 @@ ENTRY(__raw_readsw) ldrh r3, [r0] ldrh r4, [r0] - orr r3, r3, r4, lsl #16 + pack r3, r3, r4 ldrh r4, [r0] ldrh ip, [r0] - orr r4, r4, ip, lsl #16 + pack r4, r4, ip stmia r1!, {r3, r4} @@ -81,7 +88,7 @@ ENTRY(__raw_readsw) ldrh r3, [r0] ldrh ip, [r0] - orr r3, r3, ip, lsl #16 + pack r3, r3, ip str r3, [r1], #4 diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S index 57efd59cd9f5e..a4a444e11ba3c 100644 --- a/arch/arm/lib/io-writesw-armv4.S +++ b/arch/arm/lib/io-writesw-armv4.S @@ -9,7 +9,18 @@ */ #include #include -#include + + .macro outword, rd +#ifndef __ARMEB__ + strh \rd, [r0] + mov \rd, \rd, lsr #16 + strh \rd, [r0] +#else + mov lr, \rd, lsr #16 + strh lr, [r0] + strh \rd, [r0] +#endif + .endm .outsw_bad_alignment: adr r0, .outsw_bad_align_msg @@ -40,20 +51,10 @@ ENTRY(__raw_writesw) bmi .no_outsw_8 .outsw_8_lp: ldmia r1!, {r3, r4, r5, ip} - - strh r3, [r0] - mov r3, r3, lsr #16 - strh r3, [r0] - strh r4, [r0] - mov r4, r4, lsr #16 - strh r4, [r0] - strh r5, [r0] - mov r5, r5, lsr #16 - strh r5, [r0] - strh ip, [r0] - mov ip, ip, lsr #16 - strh ip, [r0] - + outword r3 + outword r4 + outword r5 + outword ip subs r2, r2, #8 bpl .outsw_8_lp @@ -64,20 +65,14 @@ ENTRY(__raw_writesw) beq .no_outsw_4 ldmia r1!, {r3, ip} - strh r3, [r0] - mov r3, r3, lsr #16 - strh r3, [r0] - strh ip, [r0] - mov ip, ip, lsr #16 - strh ip, [r0] + outword r3 + outword ip .no_outsw_4: tst r2, #2 beq .no_outsw_2 ldr r3, [r1], #4 - strh r3, [r0] - mov r3, r3, lsr #16 - strh r3, [r0] + outword r3 .no_outsw_2: tst r2, #1 ldrneh r3, [r1] -- 2.53.0